the ±VG turret" />
參數(shù)資料
型號(hào): LTC6412CUF#PBF
廠商: Linear Technology
文件頁數(shù): 9/24頁
文件大?。?/td> 0K
描述: IC VGA ANLG-CNTRL 31DB 24-QFN
標(biāo)準(zhǔn)包裝: 91
放大器類型: 可變?cè)鲆?br>
電路數(shù): 1
輸出類型: 差分
-3db帶寬: 800MHz
電流 - 電源: 110mA
電流 - 輸出 / 通道: 70mA
電壓 - 電源,單路/雙路(±): 3 V ~ 3.6 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 24-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 24-QFN 裸露焊盤(4x4)
包裝: 管件
LTC6412
17
6412fa
ltered to avoid AM upconversion artifacts. While using
the ±VG turrets, a 4.7μF capacitor from the VGAIN SMA
input to ground provides an effective lowpass lter.
Typical data curves quoted for Test Circuit A are measured
at the plane of the SMA connectors and are NOT corrected
for any losses introduced by the input and output baluns,
estimated at approximately 0.5dB and 1.2dB, respectively.
All typical AC data reported in this data sheet correspond
to Test Circuit A, except for mixed-mode S-parameters of
the form Sdd21, Scc21, etc.
Test Circuit B uses a 4-port network analyzer to measure
differential mode and common mode S-parameters
beyond the frequency limitations imposed by the balun
transformers and associated circuitry. A matching
calibration set establishes the measurement reference
planes shown in Test Circuit B. The output plane is dened
at the edge of the package while the input plane is dened
at the edge of the input pair of 0402 capacitors. The IC
land and ground via pattern are identical to that shown
for Test Circuit A. The ground via pattern directly beneath
the package is critical to provide the proper RF ground to
produce the RF characteristics quoted in this data sheet.
All mixed-mode S-parameter typical data curves of the
form SxyAB correspond to Test Circuit B following the
denitions described in Figures 5 and 6.
Typical Application Circuits
Grounding and supply decoupling should closely follow the
suggested layout shown for Test Circuit A, but the input
and output networks can be customized to suit various
application requirements.
On the input side, the differential port impedance is
very close to 50Ω over all gain settings and application
frequencies. In a differential signal chain, the differential
input signal is easily supplied from a preceding differential
output stage with a suitable DC blocking capacitor of
approximately 10nF. If the system employs a single-ended
input signal to the VGA, then a suitable balun is required
to convert to a differential input signal. The passive
conversion from 50Ω single-ended to 50Ω differential is
most effectively accomplished with a 1:1 transmission-line
balun such as the ETC1-1-13 or MABA-007159. These 1:1
balun devices are relatively inexpensive and offer excellent
APPLICATIONS INFORMATION
electrical characteristics such as low loss, broad band
response and good phase matching.
6412 F01
Figure 1. Top Silkscreen for DC1464A. Test Circuit A
On the output side, the differential port admittance is very
close to 300Ω||1.5pF across all gain settings and application
frequencies. This output port circuit must provide a path for
DC output supply current as well as any balun, matching,
or ltering functions required by the application. Thus, the
design options for the output circuitry are more varied. A
brief list of the more common output circuits is shown in
Figure 9 along with a few design guidelines to estimate
component values. Final design simulations should use the
small-signal equivalent circuit model in Figure 8 to properly
account for loading effects of the output terminals.
Figure 9a shows the simplest differential output
conguration employing two suitable inductors, L1 = L2,
to pass the DC supply current without loading the output
nodes at the application frequency. The PCB trace widths
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LTC6412CUFTRPBF 制造商:LINER 制造商全稱:Linear Technology 功能描述:800MHz, 31dB Range Analog-Controlled VGA
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LTC6412IUFPBF 制造商:LINER 制造商全稱:Linear Technology 功能描述:800MHz, 31dB Range Analog-Controlled VGA