DC ELECTRICAL CHARACTERISTICS The l denotes spe" />
參數(shù)資料
型號： LTC6412IUF#PBF
廠商： Linear Technology
文件頁數(shù)： 18/24頁
文件大?。?/td> 0K
描述： IC VGA ANLG-CNTRL 31DB 24-QFN
標(biāo)準(zhǔn)包裝： 91
放大器類型： 可變增益
電路數(shù)： 1
輸出類型： 差分
-3db帶寬： 800MHz
電流 - 電源： 110mA
電流 - 輸出 / 通道： 70mA
電壓 - 電源，單路/雙路(±)： 3 V ~ 3.6 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 24-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 24-QFN 裸露焊盤（4x4）
包裝： 管件
LTC6412
3
6412fa
DC ELECTRICAL CHARACTERISTICS The l denotes specications that apply over the full operating
temperature range, otherwise specications are at TA = 25°C. DC electrical performance measured using DC test circuit schematic.
VIN(DIFF) is dened as (+IN) – (–IN). VOUT(DIFF) is dened as (+OUT) – (–OUT). VIN(CM) is dened as [(+IN) + (–IN)]/2. VOUT(CM) is
dened as [(+OUT) + (–OUT)]/2. Unless noted otherwise, default operating conditions are VCC = 3.3V, EN = 0.8V, SHDN = 2.2V, +VG tied
to VREF (negative gain slope mode), VOUT(CM) = 3.3V. Differential power gain dened at ZSOURCE = 50Ω differential and ZLOAD = 200Ω
differential.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Gain Characteristics
GMAX
Maximum Differential Power Gain (Note 4)
–VG = 0V, VIN(DIFF) = 100mV
l
16.1
15.5
17.1
18.1
18.7
dB
GMIN
Minimum Differential Power Gain (Note 4)
–VG = 1.2V, VIN(DIFF) = 200mV
l
–16.2
–16.8
–14.9
–13.6
–13.0
dB
GRANGE
Differential Power Gain Range
GMAX-GMIN
l
30.7
30.1
31.9
33.1
33.7
dB
TCGAIN
Temperature Coefcient of Gain at Fixed VG
–VG = 0V to 1.2V
–0.007
dB/°C
GSLOPE
Gain Control Slope
–VG = 0.2V to 1.0V, 85 Points, Slope of the
Least-Square Fit Line
l
–34.1
–34.7
–32.9
–31.7
–31.1
dB/V
GCONF(AVE)
Average Conformance Error to Gain Slope Line
–VG = 0.2V to 1.0V, 85 Points, Standard
Error to the Least-Square Fit Line
0.12
0.20
dB
GCONF(MAX)
Maximum Conformance Error to Gain Slope
Line
–VG = 0.2V to 1.0V, 85 points, Maximum
Error to the Least-Square Fit Line
0.20
0.45
dB
+IN and –IN Pins
RIN(GMAX)
Differential Input Resistance at Maximum Gain
–VG = 0V, VIN(DIFF) = 100mV
l
49
47
57
65
67
Ω
RIN(GMIN)
Differential Input Resistance at Minimum Gain
–VG = 1.2V, VIN(DIFF) = 200mV
l
49
47
57
65
67
Ω
VINCM(GMAX)
Input Common Mode Voltage at Maximum Gain –VG = 0V, DC Blocking Capacitor to Input
640
mV
VINCM(GMIN)
Input Common Mode Voltage at Minimum Gain –VG = 1.2V, DC Blocking Capacitor to Input
640
mV
+VG, –VG, and VREF Pins
RIH(+VG)
+VG Input High Resistance
+VG = 1.0V, –VG Tied to VREF,
RIN(+VG) = 1V/Δ IIL(+VG)
l
7.8
7.2
9.2
10.6
11.6
kΩ
RIH(–VG)
–VG Input High Resistance
–VG = 1.0V, +VG Tied to VREF,
RIN(–VG) = 1V/Δ IIL(–VG)
l
7.8
7.2
9.2
10.6
11.6
kΩ
IIL(+VG)
+VG Input Low Current
+VG = 0V, –VG Tied to VREF
l
–9
–10
–5
–1
μA
IIL(–VG)
–VG Input Low Current
–VG = 0V, +VG Tied to VREF
l
–9
–10
–5
–1
μA
VREF
Internal Bias Voltage
–VG = 0V, +VG Tied to VREF
l
590
580
615
640
650
mV
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