參數(shù)資料
型號(hào): LTC6421IUDC-20#PBF
廠商: Linear Technology
文件頁(yè)數(shù): 16/16頁(yè)
文件大?。?/td> 0K
描述: IC ADC DRIVER DIFF 20-QFN
標(biāo)準(zhǔn)包裝: 91
類型: ADC 驅(qū)動(dòng)器
應(yīng)用: 數(shù)據(jù)采集
安裝類型: 表面貼裝
封裝/外殼: 20-WFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 20-QFN(3x4)
包裝: 管件
產(chǎn)品目錄頁(yè)面: 1323 (CN2011-ZH PDF)
LTC6421-20
9
642120fb
APPLICATIONS INFORMATION
Referring to Figure 3, LTC6421-20 can be easily congured
for single-ended input and differential output without a
balun. The signal is fed to one of the inputs through a
matching network while the other input is connected to the
same matching network and a source resistor. Because the
return ratios of the two feedback paths are equal, the two
outputs have the same gain and thus symmetrical swing. In
general, the single-ended input impedance and termination
resistor RT are determined by the combination of RS, RG
and RF. For example, when RS is 50Ω, it is found that the
single-ended input impedance is 202Ω and RT is 66.5Ω
in order to match to a 50Ω source impedance.
The LTC6421-20 is unconditionally stable. However,
the overall differential gain is affected by both source
impedance and load impedance as follows:
A
V =
V
OUT
V
IN
=
2000
R
S + 200
R
L
25 + RL
Figure 3. Input Termination for Single-Ended 50Ω Input Impedance
642120 F03
+IN
IN+
OUT
IN
OUT+
–IN
100Ω
RT
66.5Ω
0.1μF
1000Ω
LTC6421-20
100Ω
RS
50Ω
RS//RT
28.7Ω
VIN
1000Ω
+
0.1μF
Output Impedance Match
The LTC6421-20 can drive an ADC directly without external
output impedance matching. Alternatively, the differential
output impedance of 25Ω can be matched to a higher
value impedance, e.g. 50Ω, by series resistors or an LC
network.
Output Common Mode Adjustment
The output common mode voltage is set by the VOCM pin,
which is a high impedance input. The output common
mode voltage is capable of tracking VOCM in a range from
1V to 1.6V. The bandwidth of VOCM control is typically
15MHz, which is dominated by a low pass lter connected
to the VOCM pin and is aimed to reduce common mode
noise generation at the outputs. The internal common
mode feedback loop has a – 3dB bandwidth of 300MHz,
allowing fast rejection of any common mode output voltage
disturbance. The VOCM pin should be tied to a DC bias
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