ELECTRICAL CHARACTERISTICS The l denotes the sp" />
參數(shù)資料
型號： LTC6603CUF#TRPBF
廠商： Linear Technology
文件頁數(shù)： 18/24頁
文件大?。?/td> 0K
描述： IC FILTER LOWPASS 24-QFN
標(biāo)準(zhǔn)包裝： 2,500
濾波器類型： 低通
頻率 - 截止或中心： 80MHz
濾波器數(shù)： 2
濾波器階數(shù)： 9th
電源電壓： 2.7 V ~ 3.6 V
安裝類型： 表面貼裝
封裝/外殼： 24-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 24-QFN 裸露焊盤（4x4）
包裝： 帶卷 (TR)
LTC6603
3
6603fa
ELECTRICAL CHARACTERISTICS The l denotes the specications which apply over the full operating
temperature range, otherwise specications are at TA = 25°C. V+A = V+D = V+IN = 3V, VICM = VOCM = 1.5V, Gain = 0dB, lowpass
cutoff = 2.5MHz, internal clocking with RBIAS = 30.9k unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Filter Phase Either
Channel
External Clock = 80MHz, Filter Cutoff (fC) = 156.25kHz, VIN = 3.6VP-P, Pin 3 Open
fIN = 62.5kHz (0.4 fC)
fIN = 125kHz (0.8 fC)
fIN = 156.25kHz (fC)
l
158
–44
–152
161
–39
–146
163
–36
–142
deg
Matching of Filter
Phase
External Clock = 80MHz, Filter Cutoff (fC) = 156.25kHz, VIN = 3.6VP-P, Pin 3 Open
fIN = 62.5kHz (0.4 fC)
fIN = 125kHz (0.8 fC)
fIN = 156.25kHz (fC)
l
±0.2
±0.4
±0.5
±1.5
±3
±4
deg
Filter Gain Either
Channel
External Clock = 80MHz, Filter Cutoff (fC) = 2.5MHz, VIN = 3.6VP-P, Pin 3 Open
DC Gain, Gain Set = 0dB
fIN = 1MHz (0.4 fC), Relative to DC Gain
fIN = 2MHz (0.8 fC), Relative to DC Gain
fIN = 2.5MHz (fC), Relative to DC Gain
fIN = 4MHz (1.5 fC), Relative to DC Gain
l
0
–2
–0.7
–1.1
0.5
–0.8
0.4
0.1
–43
1.2
–0.1
1.5
1
–32.6
dB
Matching of Filter
Gain
External Clock = 80MHz, Filter Cutoff (fC) = 2.5MHz, VIN = 3.6VP-P, Pin 3 Open
fIN = 2MHz (0.8 fC)
fIN = 2.5MHz (fC)
l
±0.05
±0.2
±0.4
dB
Filter Phase
Either Channel
External Clock = 80MHz, Filter Cutoff (fC) = 2.5MHz, VIN = 3.6VP-P, Pin 3 Open
fIN = 1MHz (0.4 fC)
fIN = 2MHz (0.8 fC)
fIN = 2.5MHz (fC)
l
150
–45
–152
155
–39
–141
159
–28
–126
deg
Matching of Filter
Phase
External Clock = 80MHz, Filter Cutoff (fC) = 2.5MHz, VIN = 3.6VP-P, Pin 3 Open
fIN = 1MHz (0.4 fC)
fIN = 2MHz (0.8 fC)
fIN = 2.5MHz (fC)
l
±2.5
±4
deg
Filter Cutoff Accuracy
when Self Clocked
CLKCNTL = 3V (Note 4)
RBIAS = 200k
RBIAS = 54.9k
RBIAS = 30.9k
l
±3
±3.5
%
DC Gain
Filter Cutoff (fC) = 2.5MHz, 0.6V to 2.4V Each Output, Pin 3 Open
Gain Setting = 0dB
Gain Setting = 6dB
Gain Setting = 12dB
Gain Setting = 24dB
l
0
5.6
11.2
22.5
0.5
6
11.8
23.2
1.2
6.6
12.5
24
dB
DC Gain Matching
Filter Cutoff (fC) = 2.5MHz, 0.6V to 2.4V Each Output, Pin 3 Open
Gain Setting = 0dB
Gain Setting = 6dB
Gain Setting = 12dB
Gain Setting = 24dB
l
±0.1
±0.05
±0.1
±0.2
±0.1
±0.15
±0.2
dB
Noise At 200kHz
Voltage Noise Referred to the Input
Gain = 0dB
Gain = 6dB
Gain = 12dB
Gain = 24dB
–124
–129
–135
–145
dBm/Hz
Integrated Noise
Noise Bandwidth = 5MHz, Referred to the Input
Gain = 0dB
Gain = 6dB
Gain = 12dB
Gain = 24dB
–53
–59
–65
–76
dBm
THD
VIN = 2VP-P, fIN = 200kHz, Gain Setting = 24dB
–75
dB
Input Impedance
Gain = 24dB, RBIAS = 30.9k, Filter Cutoff (fC) = 2.5MHz
Differential
Common Mode
1.6
5
kΩ
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