V
參數(shù)資料
型號: LTC6605CDJC-10#PBF
廠商: Linear Technology
文件頁數(shù): 9/20頁
文件大?。?/td> 0K
描述: IC FILTER 10MHZ DUAL 22-DFN
標(biāo)準(zhǔn)包裝: 61
濾波器類型: 抗混迭
頻率 - 截止或中心: 5MHz
濾波器數(shù): 2
濾波器階數(shù): 2nd
電源電壓: 2.7 V ~ 5.25 V
安裝類型: 表面貼裝
封裝/外殼: 22-WFDFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 22-DFN(6x3)裸露焊盤
包裝: 管件
產(chǎn)品目錄頁面: 1323 (CN2011-ZH PDF)
LTC6605-10
17
660510f
Figure 8. Driving an ADC
660510 F08
3.3V
0.1μF
2.2μF
1μF
BIAS
τ = R (C1 + 2 C2)
CONTROL
ADC
3V
D15
D0
VOCM
VIN
+
21
19
AIN
+
AIN
VCM
GND
22
18
10nF
2
3
4
1
5
20
C1
C2
R
C1
+
1/2 LTC6605-10
CHANNEL A
10Ω
APPLICATIONS INFORMATION
sampling transient of the ADC (see Figure 8). The capaci-
tance serves to provide the bulk of the charge during the
sampling process, while the two resistors at the outputs
of the LTC6605-10 are used to dampen and attenuate
any charge injected by the ADC. The RC lter gives the
additional benet of band limiting broadband output noise.
The selection of the RC time constant is trial and error
for a given ADC, but the following guidelines are recom-
mended. Choose an RC time constant that is smaller than
the reciprocal of the lter cutoff frequency congured by the
LTC6605-10. Time constants on the order of 2ns do a good
job of ltering broadband noise. Longer time constants
improve SNR at the expense of settling time. The resistors
in the decoupling network should be at least 25Ω. Too large
of a resistor will leave insufcient settling time. Too small
of a resistor will not properly dampen the load transient
of the sampling process, prolonging the time required for
settling. In 16-bit applications, this will typically require a
minimum of eleven RC time constants. The 10Ω resistors
at the inputs to the ADC minimize the sampling transients
that charge the RC lter capacitors. For lowest distortion,
choose capacitors with low dielectric absorption, such as
a C0G multilayer ceramic capacitor.
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