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| 型號(hào)： | LTC6992CS6-2#TRPBF |
| 廠商： | Linear Technology |
| 文件頁(yè)數(shù)： | 13/34頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC OSC SILICON 1MHZ TSOT23-6 |
| 產(chǎn)品培訓(xùn)模塊： | TimerBlox Family Timing Devices |
| 產(chǎn)品目錄繪圖： | LTC699_TSOT-23 |
| 特色產(chǎn)品： | TimerBlox? |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 系列： | TimerBlox® |
| 類型： | 振蕩器 - 硅 |
| 頻率： | 3.81Hz ~ 1MHz |
| 電源電壓： | 2.25 V ~ 5.5 V |
| 電流 - 電源： | 365µA |
| 工作溫度： | 0°C ~ 70°C |
| 封裝/外殼： | SOT-23-6 細(xì)型，TSOT-23-6 |
| 包裝： | 帶卷 (TR) |
| 供應(yīng)商設(shè)備封裝： | TSOT-23-6 |
| 安裝類型： | 表面貼裝 |
| 配用： | DC1562A-C-ND - BOARD EVAL LTC6992-1 |
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LTC6992-1/LTC6992-2/
LTC6992-3/LTC6992-4
20
69921234fc
applicaTions inForMaTion
ing a large RSET resistor. POL = 0 and NDIV = 4 requires
DIVCODE = 1. Using Table 1, choose the R1 and R2 values
to program DIVCODE = 1.
Step 4: Select RSET
Calculate the correct value for RSET using Equation (1b).
RSET =
1MHz 50k
4 20kHz
= 625k
Since 625k is not available as a standard 1% resistor,
substitute 619k if a 0.97% frequency shift is acceptable.
Otherwise, select a parallel or series pair of resistors such
as 309k and 316k to attain a more precise resistance.
The completed design is shown in Figure 7.
6992 F07
LTC6992-4
MOD
GND
SET
OUT
V+
DIV
R1
976k
DIVCODE = 1
R2
102k
RSET
625k
VMOD
2.25V TO 5.5V
Figure 7. 20kHz PWM Oscillator
Figure 8. Duty Cycle Variation Due to VSET
VMOD (V)
0
DUT
YCYCLE
(%)
100
90
70
80
60
50
30
40
20
10
0
0.6
0.2
6992 F08
1
0.4
0.8
VSET = 0mV
VSET = 30mV
VSET = –30mV
Figure 9. Fixed-Frequency, Arbitrary Duty Cycle Oscillator
6992 F09
LTC6992-X
MOD
GND
SET
OUT
V+
DIV
R1
R2
RSET2
RSET1
2.25V TO 5.5V
D
=
5
4
RSET2
RSET1 +RSET2
1
8
Figure 8 demonstrates the worst-case impact of this varia-
tion (if VSET is at its 0.97V or 1.03V limits).
This error is in addition to the inherent PWM duty cycle
accuracy spec
D (±4.5%), so care should be taken if
accuracy at high duty cycles (VMOD near 0.9V) is critical.
Sensitivity to
VSET can be eliminated by making VMOD
proportionaltoVSET.Forexample,Figure9showsasimple
circuit for generating an arbitrary duty cycle. The equation
for duty cycle does not depend on VSET at all.
Duty Cycle Sensitivity to VSET
The output duty cycle is proportional to the ratio of VMOD/
VSET. Since VSET can vary up to ±30mV from 1V it can
effectively gain or attenuate VMOD, as shown below when
VSET is added to the equation.
D
=
VMOD
0.8 VSET + VSET
(
)
1
8
Formanydesigns,theabsoluteVMODtodutycycleaccuracy
is not critical. For others, making the simplifying assump-
tion of
VSET = 0V creates the potential for additional
duty cycle error, which increases with VMOD, reaching a
maximum of 3.4% if
VSET = –30mV.
D
VMOD
800mV
VSET
DIDEAL +
1
8
VSET
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| LTC6992CS6-3#TRMPBF | 功能描述:IC OSC SILICON 1MHZ TSOT23-6 RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 可編程計(jì)時(shí)器和振蕩器 系列:TimerBlox® 標(biāo)準(zhǔn)包裝:3,000 系列:- 類型:振蕩器 - 晶體 計(jì)數(shù):- 頻率:- 電源電壓:2.3 V ~ 5.5 V 電流 - 電源:1.07mA 工作溫度:-30°C ~ 80°C 封裝/外殼:SOT-665 包裝:帶卷 (TR) 供應(yīng)商設(shè)備封裝:SS迷你型-5D 安裝類型:表面貼裝 其它名稱:AN8955SSMTXLTR |
| LTC6992CS6-3#TRPBF | 功能描述:IC OSC SILICON 1MHZ TSOT23-6 RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 可編程計(jì)時(shí)器和振蕩器 系列:TimerBlox® 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:45 系列:- 類型:溫度 - 補(bǔ)償晶體振蕩器（TCXO） 計(jì)數(shù):- 頻率:25MHz 電源電壓:3.135 V ~ 3.465 V 電流 - 電源:1.5mA 工作溫度:-40°C ~ 85°C 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 包裝:管件 供應(yīng)商設(shè)備封裝:16-SOIC W 安裝類型:表面貼裝 |
| LTC6992CS6-3-PBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:TimerBlox Voltage-Controlled Pulse Width Modulator (PWM) |
| LTC6992CS6-3-TRPBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:TimerBlox Voltage-Controlled Pulse Width Modulator (PWM) |
| LTC6992CS6-4#PBF | 制造商:Linear Technology 功能描述:Silicon Oscillator 6-Pin TSOT-23 制造商:Linear Technology 功能描述:TIMERBLOX: VOLTAGE-CONTROLLED PULSE WIDTH MODULATOR (PWM) |
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