elecTrical characTerisTics The l denotes the specifications which apply " />
參數(shù)資料
型號(hào)： LTC6994MPS6-2#TRMPBF
廠商： Linear Technology
文件頁數(shù)： 20/26頁
文件大小： 0K
描述： IC DELAY LINE SOT-23-6
特色產(chǎn)品： TimerBlox?
標(biāo)準(zhǔn)包裝： 500
系列： TimerBlox®
功能： 可編程
可用的總延遲： 1µs ~ 33.6s
獨(dú)立延遲數(shù)： 1
電源電壓： 2.25 V ~ 5.5 V
工作溫度： -55°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： SOT-23-6 細(xì)型，TSOT-23-6
供應(yīng)商設(shè)備封裝： TSOT-23-6
包裝： 帶卷 (TR)
配用： DC1562A-E-ND - BOARD EVAL LTC6992-3
LTC6994-1/LTC6994-2
3
699412fb
elecTrical characTerisTics The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. Test conditions are V+ = 2.25V to 5.5V, IN = 0V, DIVCODE = 0 to 15
(NDIV = 1 to 221), RSET = 50k to 800k, RLOAD = 5k, CLOAD = 5pF unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
tDELAY
Delay Time
1
33.55
sec
tDELAY
Delay Accuracy (Note 4)
NDIV ≥ 512
l
±1.7
±2.3
±3.0
%
8 ≤ NDIV ≤ 64
l
±2.4
±3.4
±4.4
%
NDIV = 1
l
±3.8
±5.1
±6.2
%
tDELAY/T Delay Drift Over Temperature
NDIV ≥ 512
NDIV ≤ 64
l
±0.006
±0.008
%/°C
Delay Change With Supply
NDIV ≥ 512
V+ = 4.5V to 5.5V
V+ = 2.25V to 4.5V
l
–0.6
–0.4
–0.2
–0.1
%
8 ≤ NDIV ≤ 64
V+ = 4.5V to 5.5V
V+ = 2.7V to 4.5V
V+ = 2.25V to 2.7V
l
–0.9
–0.7
–1.1
–0.2
–0.1
0.4
0.9
%
Delay Jitter (Note 10)
NDIV = 1
V+ = 5.5V
V+ = 2.25V
1.0
0.5
%P-P
NDIV = 8
0.20
%P-P
NDIV = 64
0.05
%P-P
NDIV = 512
0.20
%P-P
NDIV = 4096
0.03
%P-P
tS
Delay Change Settling Time (Note 9)
tMASTER = tDELAY/NDIV
6 tMASTER
s
Power Supply
V+
Operating Supply Voltage Range
l
2.25
5.5
V
Power-On Reset Voltage
l
1.95
V
IS(IDLE)
Supply Current (Idle)
RL = ∞, RSET = 50k, NDIV ≤ 64
V+ = 5.5V
V+ = 2.25V
l
165
125
200
160
A
RL = ∞, RSET = 50k, NDIV ≥ 512 V+ = 5.5V
V+ = 2.25V
l
135
105
175
140
A
RL = ∞, RSET = 800k, NDIV ≤ 64 V+ = 5.5V
V+ = 2.25V
l
70
60
110
95
A
RL = ∞, RSET = 800k, NDIV ≥ 512 V+ = 5.5V
V+ = 2.25V
l
65
55
100
90
A
Analog Inputs
VSET
Voltage at SET Pin
l
0.97
1.00
1.03
V
VSET/T
VSET Drift Over Temperature
l
±75
V/°C
RSET
Frequency-Setting Resistor
l
50
800
kΩ
VDIV
DIV Pin Voltage
l
0
V+
V
VDIV/V+ DIV Pin Valid Code Range (Note 5)
Deviation from Ideal
VDIV/V+ = (DIVCODE + 0.5)/16
l
±1.5
%
DIV Pin Input Current
l
±10
nA
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