VDD = 5V, VREF = 10V, V" />
參數(shù)資料
型號(hào): LTC8143ESW
廠商: Linear Technology
文件頁(yè)數(shù): 4/8頁(yè)
文件大小: 0K
描述: IC D/A CONV 12BIT SERIAL 16-SOIC
標(biāo)準(zhǔn)包裝: 47
設(shè)置時(shí)間: 1µs
位數(shù): 12
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
功率耗散(最大): 550µW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC
包裝: 管件
輸出數(shù)目和類型: 2 電流,單極;2 電流,雙極
采樣率(每秒): *
其它名稱: LTC8143ES
4
LTC7543/LTC8143
VDD = 5V, VREF = 10V, VOUT1 = VOUT2 = AGND = DGND = 0V, TA = TMIN to TMAX, unless otherwise specified.
ELECTRICAL CHARACTERISTICS – LTC7543/LTC8143
The q denotes specifications which apply over the full operating
temperature range.
Note 1:
±0.5LSB = ±0.012% of full scale.
Note 2: Using internal feedback resistor.
Note 3: Guaranteed by design, not subject to test.
Note 4: IOUT1 with DAC register loaded with all 0s or IOUT2 with DAC
register loaded with all 1s.
Note 5: Typical temperature coefficient is 100ppm/
°C.
Note 6: OUT 1 load = 100
in parallel with 13pF.
Note 7: To 0.01% for a full-scale change, measured from falling edge of
LD1 or LD2.
Note 8: VREF = 0V. DAC register contents changed from all 0s to all 1s or
from all 1s to all 0s.
Note 9: VREF = 6VRMS at 1kHz. DAC register loaded with all 1s.
Note 10: Calculation from en = √4KTRB where: K = Boltzmann constant
(J/K
°); R = resistance (); T = resistor temperature (°K); B = bandwidth
(Hz).
Note 11: Minimum high time for STB1, STB2, STB4. Minimum low time
for STB3.
Note 12. Minimum low time for STB1, STB2, STB4. Minimum high time
for STB3.
LTC7543/LTC8143
ALL GRADES
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Timing Characteristics (Note 3)
tDS1
Serial Input to Strobe Setup Time
STB1 Used as the Strobe
q
50
5
ns
tDS2
STB2 Used as the Strobe
q
20
– 5
ns
tDS3
STB3 Used as the Strobe
q
0– 30
ns
tDS4
STB4 Used as the Strobe
q
0– 30
ns
tDH1
Serial Input to Strobe Hold Time
STB1 Used as the Strobe
q
30
10
ns
tDH2
STB2 Used as the Strobe
q
50
25
ns
tDH3
STB3 Used as the Strobe
q
80
55
ns
tDH4
STB4 Used as the Strobe
q
80
55
ns
tSRI
Serial Input Data Pulse Width
q
80
ns
tSTB1, tSTB2, Strobe Pulse Width
(Note 11)
q
80
ns
tSTB3, tSTB4
tSTB1, tSTB2, Strobe Pulse Width
(Note 12)
q
80
ns
tSTB3, tSTB4
tLD1, tLD2
Load Pulse Width
q
140
ns
tASB
LSB Strobed into Input Register
q
0ns
to Load DAC Register Time
tCLR
Clear Pulse Width
q
80
ns
SRO Timing Characteristics (LTC8143 Only)
tPD
STB2, STB3, STB4 Strobe to SRO
CL = 50pF
q
220
120
ns
Propagation Delay
tPD1
STB1 to SRO Propagation Delay
CL = 50pF
q
150
80
ns
Power Supply
VDD
Supply Voltage
q
4.75
5
5.25
V
IDD
Supply Current
Digital Inputs = 0V or VDD
q
0.1
mA
Digital Inputs = VIH or VIL
q
2mA
(tSTB = 80ns)
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