參數(shù)資料
型號: LUCL8567AP-D
英文描述: SLIC for Peoples Republic of China Applications
中文描述: 為人民共和國的中國用戶接口的應(yīng)用
文件頁數(shù): 8/42頁
文件大?。?/td> 701K
代理商: LUCL8567AP-D
8
Lucent Technologies Inc.
Data Sheet
August 1999
People’s Republic of China Applications
L8567 SLIC for
Pin Information
(continued)
Table 1. Pin Descriptions
(continued)
44-Pin 32-Pin Symbol
21
15
Type
I/O
Description
PR
Protected Ring.
The output of the ring driver amplifier and input to loop sensing
circuitry. Connect to loop through overcurrent series resistance.
Protected Tip.
The output of the tip driver amplifier and input to loop sensing cir-
cuitry. Connect to loop through overcurrent series resistance.
PWR
Battery Supply.
Most negative primary high-voltage power supply.
PWR
Battery Ground.
Ground return for battery supply.
PWR
Auxiliary Battery Supply.
Connect to the lower-voltage (magnitude) auxiliary
battery supply. If a lower-voltage auxiliary battery is not used, connect directly to
the primary high-voltage battery side.
PWR
Power Control.
With a 32-pin PLCC, connect a lower-voltage auxiliary battery
supply directly to PWR or connect a resistor from this node to high-voltage bat-
tery to control short-loop power dissipation. With a 44-pin PLCC, connect the
higher-voltage battery directly to PWR. Please see the Power Control section of
this data sheet for more information.
Filter Capacitor 1.
Connect a 0.47
μ
F capacitor from this pin to CF2.
Filter Capacitor 2.
Connect a 0.1
μ
F capacitor from this pin to AGND.
I
Transmit Gain.
Noninverting input to internal AX transmit amplifier.
Connect a
7.87 k
resistor from this node to VTX to set internal SLIC transconductance to
39.75 V/A. Transconductance of 39.75 V/A is assumed for use with T7507
codec.
O
Transmit ac Output Voltage.
Output of SLIC transmit amplifier. This output is a
voltage that is directly proportional to the differential tip/ring current.
Connect a
7.87 k
resistor from this node to TG to set internal SLIC transconductance to
39.75
.
PWR
Analog Signal Ground.
I
Receive ac Signal (Inverting).
This high-impedance input controls the ac differ-
ential voltage on tip and ring.
I
Receive ac Signal (Noninverting).
This high-impedance input controls the ac
differential voltage on tip and ring.
I
Data Enable.
Level-sensitive data latch control; when high, data at the B0, B1,
and relay driver control inputs is latched. When low, the data latch is transparent
and control signals will flow through the data latch to the SLIC control logic.
NSTAT and NTSD supervision outputs are valid only when EN is low.
O
Not Thermal Shutdown.
This gated logic output indicates if the L8567 die tem-
perature has exceeded the thermal shutdown temperature and the device has
entered the thermal shutdown mode. Input EN needs to be low for valid data to
appear at NTSD. The actual thermal shutdown is not affected by EN.
O
Loop Detector Output/Ring Trip Output.
This gated logic output is a wired-OR
of the Not Loop Closure/Not Ring Trip detect outputs. When low, this logic output
indicates that an off-hook condition exists or that ringing has been tripped. Input
EN needs to be low for valid data to appear at NSTAT.
I
State Control Input.
This latched logic input, with B0, controls the state of the
SLIC.
I
State Control Input.
This latched logic input, with B1, controls the state of the
SLIC.
22
16
PT
I/O
23
24
25
17
V
BAT1
18
19
BGND
V
BAT2
27
20
PWR
29
30
31
21
22
23
CF1
CF2
TG
33
24
VTX
34
36
25
26
AGND
RCVN
37
27
RCVP
38
28
EN
40
29
NTSD
41
30
NSTAT
44
31
B1
1
32
B0
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