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參數(shù)資料
| 型號： | LUCL9214AA-DT |
| 英文描述： | Low-Cost Ringing SLIC |
| 中文描述： | 低成本振鈴用戶接口 |
| 文件頁數(shù)： | 24/46頁 |
| 文件大?。?/td> | 790K |
| 代理商： | LUCL9214AA-DT |
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Preliminary Data Sheet
October 2001
Low-Cost Ringing SLIC
L9214A/G
24
Agere Systems Inc.
Applications
Power Control
Under normal device operating conditions, power dissi-
pation must be controlled to prevent the device temper-
ature from rising too close to the thermal shutdown
point. Power dissipation is highest with higher battery
voltages, higher current limit, and under shorter dc loop
conditions. Additionally, higher ambient temperature
will reduce thermal margin. Increasing the number of
PC board layers and increasing airflow around the
device are typical ways of improving thermal margin.
The maximum recommended junction temperature for
the L9214 is 150
°
C. The junction temperature is:
Tj = T
AMBIENT
+
θ
JA
* P
SLIC
The thermal impedance of this device depends on the
package type as well as number of PCB layers and air-
flow. The thermal impedance of the 28-pin SOG pack-
age is somewhat higher than the 32-pin PLCC
package. The 28-pin SOG package in still air with a
single-sided PCB is rated at 70
°
C/W. The 32-pin
PLCC package thermal impedance with no airflow on a
four-layer PCB is estimated at 37
°
C/W.
The power handling capability of the package is:
P
SLIC
= (150
°
C
–
T
AMBIENT
)/
θ
JA
which is a minimum of 0.93 W for the 28-pin SOG
package with a single-sided PCB and no airflow and as
much as 2.15 W for the 32-pin PLCC package with a
multilayer PCB.
This device is intended to operate with a high-voltage
primary battery of
–
63 V to
–
70 V. Under short-loop
conditions, an internal soft battery switch shunts most
(all but I
BIAS
= 3.5 mA) of the loop current to an auxiliary
battery of lower absolute voltage (typically
–
21 V).
Where single battery operation is required, an external
power control resistor can be connected from the V
BAT2
pin to V
BAT1
and all but 3.5 mA of the loop current will
flow through the power control resistor.
The power dissipated in the device is best illustrated by
an example. Assume V
BAT1
is
–
65 V, V
BAT2
is
–
21 V,
and the current limit is is I
LOOP
.
Let I
Q1
and I
Q2
be the quiescent currents drawn from
V
BAT1
and V
BAT2
respectively (the current drawn from
the battery when the phone is on-hook). Let I
BIAS
be
the additional current drawn from V
BAT1
when the
phone is off-hook.
I
BIAS
= I
VBAT1(off-hook)
–
I
Q1
Typically I
BIAS
is 3.5 mA. This additional V
BAT1
current
contributes to the loop current and the remaining loop
current is supplied by V
BAT2
, so that
I
VBAT2
= I
Q2
+ I
LOOP
–
I
BIAS
I
VCC
is the current drawn from V
CC
and is relatively con-
stant as the phone goes off hook.
The total power from the power supplies is:
P
TOTAL
= {[(I
Q1
+ I
BIAS
) * V
BAT1
] + [(I
Q2
+ I
LOOP
–
I
BIAS
) *
V
BAT2
] + [(I
VCC
) * V
CC
]}
The maximum values of I
Q1
and I
Q2
are 1.95 mA and
1.20 mA respectively from Table 4.
If the current limit is set to 25 mA, given the current limit
tolerance of 10%, the maximum current limit is
27.5 mA. Also, assume 20
of wire resistance, 30
of protection resistance, and 200
for the handset
P
TOTAL
= {[(1.95 mA + 3.5 mA) * (65 V)] + [(1.20 mA +
27.5 mA
–
3.5 mA) * (21 V)] + [(6 mA) * (5 V)]
= 913.45 mW
The power delivered to the loop and the protection
resistors (P
LOOP
) is:
P
LOOP
= {(I
LOOP
)
2
* [(2 * R
PROTECTION
) + (R
WIRE
) +
(R
PHONE
)]} = {(27.5 mA)
2
* [(2 * 30
) + (20
) +
200
)]} = 212 mW
Thus, the total power dissipated by the SLIC is:
P
D
of SLIC = Total power (P
TOTAL
)
–
power delivered to
loop and protection resistors (P
LOOP
).
P
D
= 913.45 mW
–
212 mW
= 701.45 mW for this example.
Since the minimum power handling capability of the
28-pin SOG package is 0.93 W, in this case either
package type is acceptable even with a single-sided
PCB. At higher battery voltages, higher ambient tem-
perature, and higher current limit, the required thermal
impedance drops and the 32-pin PLCC package, more
PCB layers, or some airflow might be required.
Another case to consider is the case of the power con-
trol resistor. In this case, the effective V
BAT2
voltage is:
V
BAT2
= V
BAT1
–
R
PWR
* (I
LOOP
–
I
BIAS
+ I
Q2
)
For the case of the 27.5 mA maximum current limit,
choosing R
PWR
= 1.75 k
would give V
BAT2
=
–
21 V and
the same SLIC power as above. The power in the
resistor would be:
P
RPWR
= (I
LOOP
–
I
BIAS
+ I
Q2
)
2
* R
PWR
= 1.11 W
Choosing a larger R
PWR
would result in lower V
BAT2
and
lower SLIC power, but more power in the resistor. Simi-
larly, choosing a smaller R
PWR
results in higher V
BAT2
,
higher SLIC power, and less power in the resistor.
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