Preliminary Data Sheet
September 2001
Short-Loop Ringing SLIC with Ground Start
L9216A/G
34
Agere Systems Inc.
ac Applications
(continued)
Design Examples
First-Generation Codec ac Interface Network—
Resistive Termination
The reference circuit in Figure 23 shows the complete
SLIC schematic for interface to the Agere T7504 first-
generation codec for a resistive termination imped-
ance. For this example, the ac interface was designed
for a 600
resistive termination and hybrid balance
with transmit gain and receive gain set to 0 dBm.
This is a lower feature application example and uses
single battery operation, fixed overhead, current limit,
and loop closure threshold.
Resistor R
GN
is optional. It compensates for any mis-
match of input bias voltage at the RCVN/RCVP inputs.
If it is not used, there may be a slight offset at tip and
ring due to mismatch of input bias voltage at the
RCVN/RCVP inputs. It is very common to simply tie
RCVN directly to ground in this particular mode of oper-
ation. If used, to calculate RGN, the impedance from
RCVN to ac ground should equal the impedance from
RCVP to ac ground.
Example 1, Real Termination
The following design equations refer to the circuit in
Figure 22. Use these to synthesize real termination
impedance.
Termination Impedance:
z
T
=
Receive Gain:
Transmit Gain:
Hybrid Balance:
h
bal
= 20log
h
bal
= 20log
To optimize the hybrid balance, the sum of the currents
at the VFX input of the codec op amp should be set to
0. The expression for ZHB becomes the following:
I
T/R
–
------------
z
T
50
2
+
R
P
R
GP
1
--------
R
RCV
-----------
+
+
----------------------------------
+
=
g
rcv
V
FR
-----------
=
g
rcv
1
R
T1
-----------
R
GP
-----------
+
+
1
Z
T/R
--------
+
------------------------------------------------------------------
=
g
tx
V
T/R
----------
=
g
tx
X
R
T2
--------
Z
T/R
--------
×
=
R
HB
-----------
g
tx
–
g
rcv
×
V
FR
--------------
R
HB
k
(
)
×
g
tx
g
rcv
-------------------
=