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參數(shù)資料
| 型號： | LUCL9310AP-DT |
| 元件分類： | 圓形連接器 |
| 英文描述： | Side Entry Connector Hood; Enclosure Material:Aluminum Alloy; For Use With:C146 Rectangular Circular Connectors; Thread Size:PG 21; Connecting Termination:Screw; Gender:Male; No. of Contacts:24; Operating Voltage:400V; Series:C-146 RoHS Compliant: Yes |
| 中文描述： | 線路接口和線路接入電路全功能用戶接口，振鈴繼電器，測試接入設(shè)備 |
| 文件頁數(shù)： | 32/60頁 |
| 文件大?。?/td> | 1053K |
| 代理商： | LUCL9310AP-DT |
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Data Sheet
July 2001
Full-Feature SLIC, Ringing Relay, and Test Access Device
L9310 Line Interface and Line Access Circuit
32
Agere Systems Inc.
Applications
dc Characteristics
Power Control
Under normal device operating conditions, thermal
design must ensure that the device temperature does
not rise above the thermal shutdown. Power dissipation
is highest with higher battery voltages, with higher cur-
rent limit, and under shorter dc loop conditions. Higher
ambient temperature will reduce thermal margin.
Power control may be done in several ways, by use of
the integrated automatic battery switch and a lower-
voltage auxiliary battery or by use of a power control
resistor with single battery operation. The thermal
capability of the 44-pin PLCC package is sufficient to
allow for single battery operation without the power
control resistor when the device is used under lower-
power operating conditions.
Power Derating
Operating temperature range, maximum current limit,
maximum battery voltage, minimum dc loop length, and
protection resistors’ values, number of PCB board lay-
ers, and airflow, will influence the overall thermal per-
formance. The still-air thermal resistance of the 44-pin
PLCC package is typically 38
°
C/W for a two-layer
board with 0 LFPM airflow.
The L9310 will enter thermal shutdown at a tempera-
ture of 150
°
C. The thermal design should ensure that
the SLIC does not reach this temperature under normal
operating conditions.
For this example, assume a maximum ambient operat-
ing temperature of 85
°
C, a maximum current limit of
30 mA, and a maximum battery of –56 V. Further
assume a (worst-case) minimum dc loop of 20
for
wire resistance, 50
protection resistors, and 200
for the handset. Include the effects of parameter toler-
ance in these calculations.
T
TSD
– T
AMBIENT(max)
= allowed thermal rise
150
°
C – 85
°
C = 65
°
C
Allowed thermal rise =
package thermal impedance x SLIC power dissipation
65
°
C = 38
°
C/W x SLIC power dissipation
Allowed SLIC power dissipation (P
D
) = 1.71 W
Thus, in this example, if the total power dissipated on
the SLIC is less than 1.71 W, it will not enter thermal
shutdown. Total SLIC power is calculated:
Total P
D
= maximum battery x (maximum current limit)
(current limit accuracy) + SLIC quiescent power.
For the L9310, the worst-case SLIC on-hook active qui-
escent power is 100 mW. Thus,
Total off-hook power = (I
LOOP
)(1.05) x (V
BATAPPLIED
) +
SLIC quiescent power
Total off-hook power = (0.030 A)(1.05) x (52) + 100 mW
Total off-hook power = 1.864 W
The power dissipated in the SLIC is the total power dis-
sipation less the power that is dissipated in the loop.
SLIC P
D
= total power – loop power
Loop off-hook power = (I
LOOP
x 1.05)
2
x (R
LOOPdcmin
+
2R
P
+ R
HANDSET
)
Loop off-hook power = {(0.030 A)(1.05)}
2
x
(20
+ 100
+ 200
)
Loop off-hook power = 317.5 mW
SLIC off-hook power = total off-hook power – loop off-
hook power
SLIC off-hook power = 1.864 W – 0.3175 W
SLIC off-hook power = 1.5465 W < 1.71 W
Thus, under the operating conditions of this example,
the thermal capability of the 44-pin PLCC package is
adequate to ensure that the L9310 will not be driven
into thermal shutdown and no additional power control
measures are needed. If, however, for a given set of
operating conditions, the thermal capabilities of the
package are not adequate to ensure the SLIC is driven
into thermal shutdown, then one of the power control
techniques described below should be used. Addition-
ally, even if the thermal capability of the 44-pin PLCC
package is adequate to ensure that the L9310 will not
be driven into thermal shutdown, the battery switch
technique described below can be used to reduce total
short-loop power dissipation.
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