參數(shù)資料
型號: LV1100
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PDIP24
封裝: SDIP-24
文件頁數(shù): 7/10頁
文件大小: 142K
代理商: LV1100
No. 5506-6/10
LV1100
Delay Time Data (D6 to D8)
Note: D6, D7, and D8 must not be used for any purposes other than the above commands.
D6
D7
D8
CLK FAST
CLK SLOW
L
10 ms
20 ms
L
H
20 ms
40 ms
L
H
L
30 ms
60 ms
L
H
40 ms
80 ms
H
L
50 ms
100 ms
H
L
H
60 ms
120 ms
L
H
D9
SYSTEM MUTE ON
SYSTEM MUTE OFF
D10
CLK FAST
CLK SLOW
Control Data Format
Data is read in on the rising edge of the clock.
The control data consists of 12 bits.
The input data is latched on the rising edge of the enable signal.
The clock and enable signals must be held high when not being used to control the LV1100.
Command interval time
The timing of intervals between enable signals must meet the conditions shown in the figure.
Notes on Mode Control (System Mute Usage)
1
When power is first applied, after the IC is fully operating (about 2 seconds after power is applied) applications must
send commands that turn the system muting off and then on again.
2
Applications must perform system muting on/off operations when switching the delay time or clock fast/slow
settings. After sending a system muting on command along with the new data, send the new data again, this time with
a system muting off command.
Note: By performing the operations described in items 1 and 2 here, the memory contents are initialized, thus preventing incorrect operation.
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