參數(shù)資料
型號: LV74
廠商: NXP Semiconductors N.V.
英文描述: Dual D-type flip-flop with set and reset; positive-edge trigger
中文描述: 帶設(shè)置和復(fù)位功能的雙D觸發(fā)器;上升沿觸發(fā)
文件頁數(shù): 7/16頁
文件大?。?/td> 66K
代理商: LV74
HD74LV74A
7
Switching Characteristics
V
CC
= 2.5
±
0.2 V
Ta = 25
°
C
Ta = –40 to 85
°
C
Item
Symbol
Min
Typ
Max
Min
Max
Unit
Test Conditions
FROM
(Input)
TO
(Output)
Maximum
clock
frequency
t
max
50
100
40
MHz
C
L
= 15 pF
30
70
25
C
L
= 50 pF
Propagation
delay time
t
PLH
t
PHL
9.8
14.8
1.0
17.0
ns
C
L
= 15 pF
PRE
/
CLR
Q or
Q
11.1
16.4
1.0
19.0
CLK
13.0
17.4
1.0
20.0
C
L
= 50 pF
PRE
/
CLR
Q or
Q
14.2
20.0
1.0
23.0
CLK
Setup time
t
su
8.0
9.0
ns
Data
7.0
7.0
PRE
or
CLR
inactive
Hold time
t
h
0.5
0.5
ns
Pulse width
t
w
8.0
9.0
ns
PRE
or
CLR
“L”
8.0
9.0
CLK “H” or “L”
相關(guān)PDF資料
PDF描述
LV74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS
LV86 Quad. 2-input Exclusive-OR Gates
LV86 Quad 2-input EXCLUSIVE-OR gate
LV86 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES
LV86 3V Enhanced CMOS Quad Differential Line Receiver
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