參數(shù)資料
型號(hào): LV8572AN
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: XO, clock
英文描述: LV8572A Low Voltage Real Time Clock (RTC)
中文描述: 0 TIMER(S), REAL TIME CLOCK, PDIP24
封裝: PLASTIC, DIP-24
文件頁數(shù): 17/20頁
文件大?。?/td> 329K
代理商: LV8572AN
Application Hints
Suggested Initialization Procedure for LV8572A in Battery
Backed Applications that use the V
BB
Pin.
1. Enter the test mode by writing a 1 to bit D7 in the Period-
ic Flag Register.
2. Write zero to the RAM/TEST mode Register located in
page 0, address HEX 1F.
3. Leave the test mode by writing a 0 to bit D7 in the Peri-
odic Flag Register. Steps 1,2,3 guarantee that if the test
mode had been entered during power on (due to ran-
dom pulses from the system), all test mode conditions
are cleared. Most important is that the OSC Fail Disable
bit is cleared. Refer to AN-589 for more information on
test mode operation.
4. After power on (V
CC
and V
BB
powered), select the cor-
rect crystal frequency bits (D7, D6 in the Real Time
Mode Register) as shown in Table IV.
TABLE IV
Frequency
D7
D6
32.768 kHz
0
0
4.194304 MHz
0
1
4.9152 MHz
1
0
32.0 kHz
1
1
5. Enter a software loop that does the following:
Set a 3 second(approx) software counter. The crystal
oscillator may take 1 second to start.
5.1 Write a 1 to bit D3 in the Real Time Mode Register (try
to start the clock). Make sure the crystal select bits re-
main the same as in step 1. Under normal operation, this
bit can be set only if the oscillator is running. During the
software loop, RAM, real time counters, output configu-
ration, interrupt control and timer functions may be ini-
tialized.
6. Test bit D6 in the Periodic Flag Register:
IF a 1,
go to 5.1. If this bit remains a 1 after 3 seconds,
then abort and check hardware. The crystal may be de-
fective or not installed. There may be a short at OSC IN
or OSC OUT to V
CC
or GND, or to some impedance that
is less than 10 M
X
.
IF a 0,
then the oscillator is running, go to step 7.
7. Write a 0 to bit D6 in the Periodic Flag Register. This
action puts the clock chip in the battery backed mode.
This mode can be entered only if the OSC fail flag (bit
D6 of the Periodic Flag Register) is a 0. Reminder, Bit
D6 is a dual function bit. When read, D6 returns oscilla-
tor status. When written, D6 causes either the Battery
Backed Mode, or the Single Supply Mode of operation.
The only method to ensure the chip is in the battery
backed mode is to measure the waveform at the OSC
OUT pin. If the battery backed mode was selected suc-
cessfully, then the peak to peak waveform at OSC OUT
is referenced to the battery voltage. If not in battery
backed mode, the waveform is referenced to V
CC
. The
measurement should be made with a high impedance
low capacitance probe (10 M
X
, 10 pF oscilloscope
probe or better). Typical peak to peak swings are within
0.6V of V
CC
and ground respectively.
8. Write a 1 to bit D7 of Interrupt Control Register 1. This
action enables the PFAIL pin and associated circuitry.
9. Initialize the rest of the chip as needed.
Typical Application
TL/F/11417–19
*
These components may be necessary to meet UL requirements
for lithium batteries. Consult battery manufacturer.
17
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