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參數(shù)資料
| 型號(hào)： | LV9744DEV-670.0M-T500 |
| 廠商： | PLETRONICS INC |
| 元件分類： | XO, clock |
| 英文描述： | CRYSTAL OSCILLATOR, CLOCK, 670 MHz, LVDS OUTPUT |
| 封裝： | ROHS COMPLIANT, CERAMIC, SMD, 6 PIN |
| 文件頁(yè)數(shù)： | 3/8頁(yè) |
| 文件大?。?/td> | 284K |
| 代理商： | LV9744DEV-670.0M-T500 |
LV91/LV97 Series
3.3 V
LVDS Clock Oscillators
July 2007
www.pletronics.com 425-776-1880
3
Electrical Specification for 3.30V +10% over the specified temperature range and the
frequency range of 10.9 MHz to 670 MHz
Item
Min
Max
Unit
Condition
Frequency Accuracy “
45
"
-50
+50
ppm
For all supply voltages, load changes, aging for 1
year, shock, vibration and temperatures
“
44
"
-25
+25
“
20
"
-20
+20
Output Waveform
LVDS
Output High Level
--
1.60
Volts
See load circuit
R1 = 50 ohms
Output Low Level
0.90
--
Volts
Differential Output (V
OD
)
Output Offset Voltage (V
OS
)
Differential Output Error (dV
OS
)
Output Symmetry
250
450
mVolts
1.125
1.375
Volts
--
50
mVolts
47
53
%
Referenced to 50% of amplitude or
crossing point
Output T
RISE
and T
FALL
Jitter
150
230
pS
Vth is 20% and 80% of waveform
-
0.6
pS RMS
Measured from 12KHz to 20MHz from Fnominal
-
2.8
Measured from 10Hz to 20MHz from Fnominal
Output Short Circuit Current
-
-20
mA
Vout = 0.0V
Vcc Supply Current
-
80
mA
Enable/Disable
Internal Pull-up
50
-
Kohm
To Vcc (equivalent resistance)
V disable
-
0.8
Volts
Referenced to Ground
V enable
2.0
-
Volts
Referenced to Ground
Output leakage V
OUT
= V
CC
V
OUT
= 0V
Enable
-20
+20
uA
Pad 1 low, device disabled
-20
+20
uA
-
10
nS
Time for output to reach a logic state
Disable time
-
10
nS
Time for output to reach a high Z state
Start up time
-
5
mS
Measured from the time Vcc = 3.0V
Operating Temperature Range
-10
+70
o
C
Standard Temperature Range
-40
+85
o
C
Extended Temperature Range “
E
” Option
Storage Temperature Range
-55
+125
o
C
Specifications with E/D open circuit or connected to V
CC
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