- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄69008 > LX1691IPWTR (MICROSEMI CORP-ANALOG MIXED SIGNAL GROUP) 0.1 A FLUORESCENT LIGHT CONTROLLER, 250 kHz SWITCHING FREQ-MAX, PDSO16 PDF資料下載
參數(shù)資料
| 型號： | LX1691IPWTR |
| 廠商： | MICROSEMI CORP-ANALOG MIXED SIGNAL GROUP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 0.1 A FLUORESCENT LIGHT CONTROLLER, 250 kHz SWITCHING FREQ-MAX, PDSO16 |
| 封裝： | LEAD FREE, PLASTIC, TSSOP-16 |
| 文件頁數(shù)： | 8/15頁 |
| 文件大?。?/td> | 270K |
| 代理商： | LX1691IPWTR |
Microsemi
Integrated Products
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 2
Copyright
2003
Rev. 1.0, 7/16/2004
WWW
.Microse
m
i
.CO
M
LX1691
Enhanced Multi-Mode CCFL Controller
PRODUCTION DATA SHEET
TM
ABSOLUTE MAXIMUM RATINGS
Supply Voltage (VDDP) ..................................................................................................... 6V
Digital Input (ENABLE)....................................................................... -0.3V to VDDP +0.5V
Analog Inputs (I_SNS, OC_SNS, OV_SNS)clamped to +/- 10V. Max peak current +/-100mA
Analog Inputs (BRITE_IN)................................................................... -0.3V to VDDP +0.5V
DIM_MODE
Input ................................................................................ -0.3V to VDDP +0.5V
DD_CLK Digital Input ........................................................................ 0.3V to VDDP +0.5V
Digital Output (AOUT, BOUT) .................................................................. -0.3V to VDDP +0.5V
Analog Outputs (BRITE_R, I_R, EA_OUT,BRITE_OUT) ....................... -0.3V to VDDP +0.5V
Operating Temperature Range ........................................................................ -55 to 125°C
Maximum Junction Temperature ...............................................................................150°C
Package Peak Temperature for Solder Reflow (40 Seconds Maximum Exposure) ......... 255°C (+5 -0)
Note:
Exceeding these ratings could cause damage to the device. All voltages are with respect to
Ground. Currents are positive into, negative out of specified terminal.
PACKAGE PIN OUT
V
DDP
OP_SNS
VIN_SNS
BRITE_IN
B
OUT
A
OUT
V
DDA
I_SNS
DIM_MODE
GND
DIM_CLK
EA_OUT
I_R
ENABLE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
BRITE_OUT
BRITE_R
PW PACKAGE
(Top View)
Pb-free 100% Matte Tin Lead Finish
TH ERMAL DATA
PW
Plastic TSSOP 16-Pin
THERMAL RESISTANCE-JUNCTION TO AMBIENT,
θ
JA
99°C/W
Junction Temperature Calculation: TJ = TA + (PD x θJA).
The
θJA numbers are guidelines for the thermal performance of the device/pc-board
system. All of the above assume no ambient airflow.
FUNCTIONAL PIN DESCRIPTION
PIN NAME
DESCRIPTION
GND
Ground
VDDP
Voltage Input, 3.0 to 5.5V input range. VDDP is switched (see ENABLE) to remove power from chip. An LDO
regulator follows the switch and generates VDDA (see VDDA). The output driver stages are powered directly from
the VDDP input. Care must be taken in power distribution design to minimize transients and noise coupling from
VDDP to the VDDA output.
VDDA
Analog VDDA Supply Output. This output pin is used to connect an external capacitor to stabilize and filter the on
chip VDDA LDO regulator. The input of the LDO is the switched VDDP supply. LDO output is normally 3.0V and is
used to drive all circuitry except the output buffers at AOUT and BOUT. Drop out voltage is typically 50mV (@
25°C) at 5mA, the average internal load. This output can supply up to a 5 mA external load. The output
capacitor recommended is <1000nF of the ceramic dielectric type.
AOUT
A buffer N-FET driver output. 10K internal pull down, ± 100 mA peak current with 3 VDC applied to VDDP pin.
BOUT
B buffer N-FET driver output. 10K internal pull down, ± 100 mA peak current with 3 VDC applied to VDDP pin.
DD_CLK*
Digital Dimming Clock / Dimming Polarity. An input pin that may be selected to control burst frequency for Digital
Dimming. This input can be forced to VDDA or VSS or any clock signal up to 1MHz. This pin is also used to
control the dimming polarity when operating in the internally clocked digital dimming mode*. If DIM_MODE is in
the open condition (Analog Dimming Mode) the DD_CLK input is tied to VDDA or open (internal pull-up) to select
conventional dimming polarity. It is tied to Ground for reverse polarity. Conventional polarity means that lamp
brightness increases with increasing voltage on the BRITE_IN pin. Reverse polarity means that brightness
decreases with increasing voltage. If DIM_MODE is open and a low frequency pulse is applied to DD_CLK, lamp
current amplitude is directly proportional to the voltage at BRITE_IN, and its duty cycle follows the DD_CLK
waveform, e.g., current flows when DD_CLK is high. In this mode pulse count should be greater than fault
count..
PP
AA
CC
KK
AA
GG
EE
DD
AA
TT
AA
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LX1741CLM-TR | 0.145 A SWITCHING CONTROLLER, PDSO8 |
| LX1741CDU-TR | 0.145 A SWITCHING CONTROLLER, PDSO8 |
| LX1882-00CDMT | SWITCHED CAPACITOR REGULATOR, 620 kHz SWITCHING FREQ-MAX, PDSO8 |
| LX1882-33CDUT | SWITCHED CAPACITOR REGULATOR, 620 kHz SWITCHING FREQ-MAX, PDSO8 |
| LX1882-00CDUT | SWITCHED CAPACITOR REGULATOR, 620 kHz SWITCHING FREQ-MAX, PDSO8 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LX1691IPW-TR | 制造商:Microsemi Corporation 功能描述:CCFL DRVR 5.5V 16TSSOP - Tape and Reel |
| LX1692 | 制造商:MITSUMI 制造商全稱:Mitsumi Electronics, Corp. 功能描述:Full Bridge Resonant CCFL Controller |
| LX1692A | 制造商:MICROSEMI 制造商全稱:Microsemi Corporation 功能描述:Full Bridge Resonant CCFL Controller |
| LX1692AIPW | 制造商:Microsemi Corporation 功能描述:FULL BRIDGE RESONANT CCFL CONTROLLER 制造商:Microsemi Corporation 功能描述:CCFL DRVR 22V 20TSSOP - Bulk 制造商:Microsemi Corporation 功能描述:LX1692AIPW Series 7 to 22 V Supply Voltage Full Bridge CCFL Controller- TSSOP-20 制造商:MS4 功能描述:LX1692AIPW Series 7 to 22 V Supply Voltage Full Bridge CCFL Controller- TSSOP-20 |
| LX1692B | 制造商:MICROSEMI 制造商全稱:Microsemi Corporation 功能描述:Full Bridge Resonant CCFL Controller |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。