參數(shù)資料
型號: LX1882-00CDU-TR
廠商: MICROSEMI CORP-ANALOG MIXED SIGNAL GROUP
元件分類: 穩(wěn)壓器
英文描述: SWITCHED CAPACITOR REGULATOR, 620 kHz SWITCHING FREQ-MAX, PDSO8
封裝: LEAD FREE, PLASTIC, MSOP-8
文件頁數(shù): 10/13頁
文件大?。?/td> 316K
代理商: LX1882-00CDU-TR
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 6
Copyright
2000
Rev. 1.0e, 2005-03-03
WWW
.Microse
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i
.CO
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LX1882
Charge Pump Doubler with Linear Regulator
PRODUCTION DATA SHEET
I N T E GRA T ED
PR ODUC T S
APPLI CATI ON I N FORMATI O N
OPERATION
Using a switched-capacitor charge pump, the LX1882
generates a charge pump output (CPO) voltage approximately
twice the input voltage. The charge pump is a doubler
configuration using one external flying capacitor. A 2-phase
non-overlapping clock, generated from an internally trimmed
oscillator, controls the charge pump switches to ensure
maximum efficiency. CPO powers an internal low dropout
(LDO) linear regulator providing a regulated output at VOUT.
CPO can also be used to drive an external load; refer to section
on CPO Loading. The CPO voltage and VIN are sensed via
internal comparators for power-up conditioning. At power-up,
the LDO is disabled and the load is removed from CPO. The
LDO is enabled when the CPO voltage reaches 1.75(VIN). When
the CPO voltage drops below 1.45(VIN), the LDO is disabled.
Sensing the LX1882 output current determines the charge pump
operating mode. If the output current is less than 100uA and the
CPO voltage is greater than 1.95(VIN), the charge pump operates
in Burst Mode. In Burst Mode, the clock is disabled for
increased
efficiency,
until
the
CPO
voltage
droops
approximately 100mV at which time the clock is enabled. To
minimize noise at CPO, a low ESR capacitor of at least 2uF
should be used.
The internal LDO can supply up to 50mA of output current
and requires an output capacitor between VOUT and GND to
stabilize the internal control loop. A low ESR capacitor of at
least 2uF is recommended.
ADJUSTABLE OUTPUT VOLTAGE
The LX1882-00 develops a 1.175 reference voltage between the
FB pin and GND. The output voltage can be set using an
external resistor divider (see Figure 3).
7
8
4
1
2
3
6
V
IN
1.8V to 4.4V
OFF ON
V
OUT = 1.175 [1+(R1/R2)]
SHDN
FB
GND
C+
V
IN
C-
CPO
LX1882-00
5
C1
C2
C3
C4
V
OUT
R1
R2
Figure 3. LX1882-00; Adjustable Version
The output voltage range is 2.5V to 5.5V.
MAXIMUM VOUT AND IOUT CALCULATIONS
Using the open circuit CPO voltage (≈ 2(VIN)), the dropout
voltage of the LDO, and the effective charge pump output
resistance, the maximum available output voltage and current
can be calculated.
MAXIMUM VOUT AND IOUT CALCULATIONS (CONTD)
The maximum available output voltage can be calculated given
a minimum input voltage and output current load using the
following equation:
VOUT(max) = 2(VIN(min) – (IOUT)(RCPO) - VDROPOUT
with the condition that (IOUT )(RCPO ) < 0.55VIN .
Example:
VIN(max) = 3V
IOUT = 10mA
RCPO(max) = 20
Unloaded CPO Voltage (max) = 6V
Loaded CPO Voltage = 6V – (10mA)(20) = 5.8V
VDROPOUT = 0.075V
VOUT(max) = (6V) – (0.2) – (0.075) = 5.73
VOUT < 5.5 and (IOUT)(RCPO) < 0.55VIN, 0.2V < 1.65V
For minimum noise applications, keep the LDO out of dropout to
prevent CPO noise from coupling into VOUT.
CAPACITOR SELECTION
To reduce noise and ripple, it is recommended to use low ESR
capacitors for C2 (VOUT), C3 (CPO), and C4 (VIN); see Figure 1.
For stability purposes, C2 must be at least 2uF and C3 must be
equal to or greater than C2. It is also recommended that C4 be at
least 2uF. A 2.2 resistor may be required between VIN and the
supply to reduce ripple that may be induced onto the voltage rail
due to large instantaneous currents demanded by the charge
pump.
A 0.22uF, low ESR ceramic capacitor is recommended for C1
(charge pump flying capacitor). To improve VOUT ripple for light
loads or for high VIN, a smaller capacitor could be used for C1 to
reduce ripple on CPO.
To minimize the enable time, the CPO filter capacitor (C3)
should be at least 2x the VOUT filter capacitor (C2). At power-up,
the LDO is disabled and the load is removed from CPO. When
the CPO voltage reaches 1.75(VIN) the LDO is enabled and a
large amount of charge is dumped from the CPO capacitor into
the VOUT capacitor. If the amount of charge dumped causes the
CPO voltage to fall below 1.45(VIN), the LDO will be disabled
and the CPO voltage will have to charge up to 1.75(VIN) to
enable the LDO. This cycle results in an extended enable time.
For the LX1882-33, a 1nF filter capacitor should be connected
between the FILT pin and GND for optimum noise performance.
CPO LOADING
The CPO can drive an external load. Current draw by the
external load will reduce the maximum available current at VOUT
(i.e. if CPO is driving a 5mA load, the available current from
VOUT will be reduced by 5mA).
AA
PP
LL
IICC
AA
TT
IIOO
NN
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