Microsemi
Linfinity Microelectronics Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 2
Copyright
2000
Rev. 0.6f,2000-09-15
W
M
.
LX8610-xx
1A BiCMOS Very Low Dropout Regulators
P
RELIMINARY
D
ATASHEET
A M I C R O S E M I C O M P A N Y
Input Voltage (V
IN
) ......................................................................................................6.5V
Enable Pin..............................................................................................-0.3V to V
IN
+0.3V
Operating Junction Temperature Plastic (ST & DM) Packages .................................125°C
Storage Temperature...................................................................................-65°C to 150°C
Lead Temperature (Soldering, 10 Seconds) ...............................................................300°C
Note:
Exceeding these ratings could cause damage to the device. All voltages are with respect to
Ground. Currents are positive into, negative out of specified terminal.
1
2
3
V
IN
GND
V
OUT
TAB IS GND
ST PACKAGE
(Top View)
1
2
3
4
5
6
7
8
V
OUT
V
IN
ENABLE
ADJ
GND/
HEATSINK
GND/
HEATSINK
GND/
HEATSINK
GND/
HEATSINK
DM PACKAGE
(Top View)
ST
P
LASTIC
SOT-223 P
ACKAGE
THERMAL RESISTANCE-JUNCTION TO TAB,
θ
JT
THERMAL RESISTANCE-JUNCTION TO AMBIENT,
θ
JA
DM
P
LASTIC
SOIC P
ACKAGE
THERMAL RESISTANCE
-
JUNCTION TO AMBIENT
,
θ
JLD
THERMAL RESISTANCE
-
JUNCTION TO AMBIENT
,
θ
JA
15
°
C/W*
150
°
C/W
30°C/W
90°C/W
Junction Temperature Calculation: T
J
= T
A
+ (P
D
x
θ
JA
).
The
θ
JA
numbers are guidelines for the thermal performance of the device/pc-board
system. All of the above assume no ambient airflow.
θ
JA
can be improved with package soldered copper area over backside ground plane or
internal power plane
.
θ
JA
can vary from 45°C/W > 75°C/W depending on mounting
technique. See table below for thermal resistance guidelines
:
Copper Area
(Topside)*
Copper Area
(Backside)*
Board Area
Thermal
Resistance
(
θ
JA)
ST (SOT-223)
2.0 sq” (1290mm
2
)
1.0 sq” (645 mm
2
)
0.5 sq” (323 mm
2
)
0.25 sq” (161 mm
2
)
1.0 sq” (645 mm
)
0.5 sq” (323 mm
2
)
0.1 sq” (65 mm
2
)
0.1 sq” (65 mm
2
)
2.0 sq” (1290mm
2
)
1.0 sq” (645 mm
2
)
0.5 sq” (323 mm
2
)
0.25 sq” (161 mm
2
)
45°C/W
50°C/W
60°C/W
70°C/W
DM (SOIC)
2.0 sq” (1290mm
2
)
1.0 sq” (645 mm
2
)
0.5 sq” (323 mm
2
)
0.25 sq” (161 mm
2
)
*Tab of device attached to topside copper, or leads 2,3,5,6 of SOIC package
1.0 sq” (645 mm
)
0.5 sq” (323 mm
2
)
0.1 sq” (65 mm
2
)
0.1 sq” (65 mm
2
)
2.0 sq” (1290mm
2
)
1.0 sq” (645 mm
2
)
0.5 sq” (323 mm
2
)
0.25 sq” (161 mm
2
)
60°C/W
67°C/W
70°C/W
75°C/W
Possible Heat Sink Approaches
using PCB Copper
1
2
4
3
5
6
8
7
P
A
C
K
A
G
E
D
A
T
A