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參數(shù)資料
| 型號： | LXC6176 |
| 廠商： | Digital Data Communications GmbH |
| 英文描述： | 39513254 |
| 中文描述： | 集成的T1/E1短途收發(fā)器傳輸JA |
| 文件頁數(shù)： | 6/18頁 |
| 文件大小： | 349K |
| 代理商： | LXC6176 |
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Data received for transmission onto the line is clocked seri-
ally into the device at TPOS and TNEG. Input synchroni-
zation is supplied by the transmit clock (TCLK). The
transmitted pulse shape is determined by Equalizer Control
signals EC1 through EC3 as shown in Table 4. Refer to
Test Specifications for master and transmit clock timing
characteristics. Shaped pulses are applied to the AMI line
driver for transmission onto the line at TTIP and TRING.
Equalizer Control signals may be hardwired in the Hard-
ware Mode, or input as part of the serial data stream (SDI)
in the Host Mode
Pulses can be shaped for either 1.544 or 2.048 Mbps appli-
cations. 1.544 Mbps pulses for DSX-1 applications can be
programmed to match line lengths from 0 to 655 feet of
ABAM cable. The LXT305A also matches FCC and
ECSA specifications for CSU applications. 2.048 Mbps
pulses can drive coaxial or shielded twisted-pair lines.
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Jitter attenuation of the LXT305A transmit outputs is pro-
vided by a Jitter Attenuation Loop (JAL) and an Elastic
Store (ES). An external crystal oscillating at 4 times the bit
rate provides clock stabilization. Refer to Application
Information for crystal specifications. The ES is a 32 x 2-
bit register. Transmit data is clocked into the ES with the
transmit clock (TCLK) signal, and clocked out of the ES
with the dejittered clock from the JAL. When the bit count
in the ES is within two bits of overflowing or underflowing,
the ES adjusts the output clock by 1/8 of a bit period. The
ES produces an average delay of 16 bits in the receive path.
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The LXT305A transmits data as a 50% AMI line code as
shown in Figure 2. The output driver maintains a constant
low output impedance regardless of whether it is driving
marks or spaces. This well controlled output impedance
provides excellent return loss (> 18 dB) when used with
external 9.1
″
precision (± 1 % accuracy) in series with a
transmit transformer with a turns ratio of 1:2.3 (± 2% accu-
racy). Series resistors also provide increased surge protec-
tion and reduced short circuit current flow.
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The LXT305A can be controlled through hard-wired pins
(Hardware Mode) or by a microprocessor through a serial
interface (Host Mode). The mode of operation is set by the
MODE pin logic level. The LXT305A can also be com-
manded to operate in one of several diagnostic modes.
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