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參數(shù)資料
| 型號(hào)： | LXP600A |
| 廠商： | Digital Data Communications GmbH |
| 英文描述： | Low-Jitter Clock Adapters(CLADs) |
| 中文描述： | 低抖動(dòng)時(shí)鐘適配器（CLADs） |
| 文件頁(yè)數(shù)： | 2/10頁(yè) |
| 文件大?。?/td> | 680K |
| 代理商： | LXP600A |
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Frame Sync Output.
Frame synchronization output at 8 kHz. FSO is synced to CLKO
and to FSI (if FSI is provided).
High Frequency Output
HFO is used to derive CLKO. HFO can also clock external
devices. HFO is always a multiple of CLKO (CLKO x2, x3, or x4).
Actual frequencies are determined by device, CLKI and CLKO frequencies and Mode
Select (SEL) input, as listed in Table 2.
Clock Input
Input clock (1.544, 2.048 or 4.096 MHz) to be converted.
Clock Output
Output clock (1.544, 2.048 or 4.096 MHz) derived from CLKI.
Ground
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Mode Select.
controls frequency conversion as listed in Table 2.
When SEL = High, higher frequency CLKI (2.048 for LXP600A and LXP602, or 4.096
MHz for LXP604) is converted to 1.544 MHz CLKO.
When SEL = Low, 1.544 MHz CLKI is converted to higher frequency CLKO (2.048 for
LXP600A and LXP602, or 4.096 MHz for LXP604).
Frame Sync Input
8 kHz frame synchronization pulse. Tie High or Low if not used.
Power Supply
+5 V power supply input.
FSI
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PDF描述 |
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| LXP602 | Low-Jitter Clock Adapters(CLADs) |
| LXP604 | Low-Jitter Clock Adapters(CLADs) |
| LXP610 | Low-Jitter Multi-Rate Clock Adapter(CLAD) |
| LXP730 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LXP600ANE | 制造商:Level One 功能描述:PCM, OTHER/SPECIAL/MISCELLANEOUS, 8 Pin, Plastic, DIP 制造商:LEVELONE 功能描述:PCM, OTHER/SPECIAL/MISCELLANEOUS, 8 Pin, Plastic, DIP |
| LXP600ASE | 制造商:LEVELONE 功能描述: |
| LXP602 | 制造商:LVL1 制造商全稱:LVL1 功能描述:Low-Jitter Clock Adapters(CLADs) |
| LXP602NE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PCM， Other/Special/Miscellaneous |
| LXP602SE | 制造商:LEVEL_ONE 功能描述: |
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