參數(shù)資料
型號: M1A3P600-FG256I
元件分類: FPGA
英文描述: FPGA, 13824 CLBS, 600000 GATES, PBGA256
封裝: 17 X 17 MM, 1.60 MM HEIGHT, 1 MM PITCH, FBGA-256
文件頁數(shù): 164/218頁
文件大?。?/td> 6270K
代理商: M1A3P600-FG256I
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1 – ProASIC3 Device Family Overview
General Description
ProASIC3, the third-generation family of Actel flash FPGAs, offers performance, density, and
features beyond those of the ProASICPLUS family. Nonvolatile flash technology gives ProASIC3
devices the advantage of being a secure, low-power, single-chip solution that is live at power-up
(LAPU). ProASIC3 is reprogrammable and offers time-to-market benefits at an ASIC-level unit cost.
These features enable designers to create high-density systems using existing ASIC or FPGA design
flows and tools.
ProASIC3 devices offer 1 kbit of on-chip, reprogrammable, nonvolatile FlashROM storage as well as
clock conditioning circuitry based on an integrated phase-locked loop (PLL). The A3P015 and
A3P030 devices have no PLL or RAM support. ProASIC3 devices have up to 1 million system gates,
supported with up to 144 kbits of true dual-port SRAM and up to 300 user I/Os.
ProASIC3 devices support the ARM Cortex-M1 processor. The ARM-enabled devices have Actel
ordering numbers that begin with M1A3P (Cortex-M1) and do not support AES decryption.
Flash Advantages
Reduced Cost of Ownership
Advantages to the designer extend beyond low unit cost, performance, and ease of use. Unlike
SRAM-based FPGAs, flash-based ProASIC3 devices allow all functionality to be live at power-up; no
external boot PROM is required. On-board security mechanisms prevent access to all the
programming information and enable secure remote updates of the FPGA logic. Designers can
perform secure remote in-system reprogramming to support future design iterations and field
upgrades with confidence that valuable intellectual property (IP) cannot be compromised or
copied. Secure ISP can be performed using the industry-standard AES algorithm. The ProASIC3
family device architecture mitigates the need for ASIC migration at higher user volumes. This
makes the ProASIC3 family a cost-effective ASIC replacement solution, especially for applications in
the consumer, networking/ communications, computing, and avionics markets.
Security
The nonvolatile, flash-based ProASIC3 devices do not require a boot PROM, so there is no
vulnerable external bitstream that can be easily copied. ProASIC3 devices incorporate FlashLock,
which provides a unique combination of reprogrammability and design security without external
overhead, advantages that only an FPGA with nonvolatile flash programming can offer.
ProASIC3 devices utilize a 128-bit flash-based lock and a separate AES key to secure programmed
intellectual property and configuration data. In addition, all FlashROM data in ProASIC3 devices
can be encrypted prior to loading, using the industry-leading AES-128 (FIPS192) bit block cipher
encryption standard. The AES standard was adopted by the National Institute of Standards and
Technology (NIST) in 2000 and replaces the 1977 DES standard. ProASIC3 devices have a built-in AES
decryption engine and a flash-based AES key that make them the most comprehensive
programmable logic device security solution available today. ProASIC3 devices with AES-based
security allow for secure, remote field updates over public networks such as the Internet, and
ensure that valuable IP remains out of the hands of system overbuilders, system cloners, and IP
thieves. The contents of a programmed ProASIC3 device cannot be read back, although secure
design verification is possible.
ARM-enabled ProASIC3 devices do not support user-controlled AES security mechanisms. Since the
ARM core must be protected at all times, AES encryption is always on for the core logic, so
bitstreams are always encrypted. There is no user access to encryption for the FlashROM
programming data.
相關(guān)PDF資料
PDF描述
M1A3P600-FG256 FPGA, 13824 CLBS, 600000 GATES, 350 MHz, PBGA256
M1A3P600-FG484I FPGA, 13824 CLBS, 600000 GATES, PBGA484
M1A3P600-FG484 FPGA, 13824 CLBS, 600000 GATES, 350 MHz, PBGA484
M1A3P600-FGG144I FPGA, 13824 CLBS, 600000 GATES, PBGA144
M1A3P600-FGG144 FPGA, 13824 CLBS, 600000 GATES, 350 MHz, PBGA144
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M1A3P600-FG484 功能描述:IC FPGA 1KB FLASH 600K 484-FBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:ProASIC3 標準包裝:90 系列:ProASIC3 LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計:36864 輸入/輸出數(shù):157 門數(shù):250000 電源電壓:1.425 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 125°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-FPBGA(17x17)
M1A3P600-FG484I 功能描述:IC FPGA 1KB FLASH 600K 484-FBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:ProASIC3 標準包裝:40 系列:SX-A LAB/CLB數(shù):6036 邏輯元件/單元數(shù):- RAM 位總計:- 輸入/輸出數(shù):360 門數(shù):108000 電源電壓:2.25 V ~ 5.25 V 安裝類型:表面貼裝 工作溫度:0°C ~ 70°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FPBGA(27X27)
M1A3P600-FGG144 功能描述:IC FPGA 1KB FLASH 600K 144-FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:ProASIC3 標準包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA,CSBGA 供應(yīng)商設(shè)備封裝:289-CSP(14x14)
M1A3P600-FGG144ES 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:ProASIC3 Flash Family FPGAs
M1A3P600-FGG144I 功能描述:IC FPGA 1KB FLASH 600K 144-FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:ProASIC3 標準包裝:90 系列:ProASIC3 LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計:36864 輸入/輸出數(shù):157 門數(shù):250000 電源電壓:1.425 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 125°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-FPBGA(17x17)