2-18 Revision 13 Summary of I/O Timing Characteristics – Default I/O Software Settings
參數(shù)資料
型號: M1A3PE1500-2PQ208I
廠商: Microsemi SoC
文件頁數(shù): 89/162頁
文件大?。?/td> 0K
描述: IC FPGA 1KB FLASH 1.5M 208-PQFP
標(biāo)準(zhǔn)包裝: 24
系列: ProASIC3E
RAM 位總計(jì): 276480
輸入/輸出數(shù): 147
門數(shù): 1500000
電源電壓: 1.425 V ~ 1.575 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 85°C
封裝/外殼: 208-BFQFP
供應(yīng)商設(shè)備封裝: 208-PQFP(28x28)
ProASIC3E DC and Switching Characteristics
2-18
Revision 13
Summary of I/O Timing Characteristics – Default I/O Software
Settings
Table 2-15 Summary of AC Measuring Points
Standard
Input Reference Voltage
(VREF_TYP)
Board Termination
Voltage (VTT_REF)
Measuring Trip Point
(Vtrip)
3.3 V LVTTL / 3.3 V
LVCMOS
1.4 V
3.3 V LVCMOS Wide Range
1.4 V
2.5 V LVCMOS
1.2 V
1.8 V LVCMOS
0.90 V
1.5 V LVCMOS
0.75 V
3.3 V PCI
0.285 * VCCI (RR)
0.615 * VCCI (FF))
3.3 V PCI-X
0.285 * VCCI (RR)
0.615 * VCCI (FF)
3.3 V GTL
0.8 V
1.2 V
VREF
2.5 V GTL
0.8 V
1.2 V
VREF
3.3 V GTL+
1.0 V
1.5 V
VREF
2.5 V GTL+
1.0 V
1.5 V
VREF
HSTL (I)
0.75 V
VREF
HSTL (II)
0.75 V
VREF
SSTL2 (I)
1.25 V
VREF
SSTL2 (II)
1.25 V
VREF
SSTL3 (I)
1.5 V
1.485 V
VREF
SSTL3 (II)
1.5 V
1.485 V
VREF
LVDS
Cross point
LVPECL
Cross point
Table 2-16 I/O AC Parameter Definitions
Parameter
Definition
tDP
Data to Pad delay through the Output Buffer
tPY
Pad to Data delay through the Input Buffer with Schmitt trigger disabled
tDOUT
Data to Output Buffer delay through the I/O interface
tEOUT
Enable to Output Buffer Tristate Control delay through the I/O interface
tDIN
Input Buffer to Data delay through the I/O interface
tPYS
Pad to Data delay through the Input Buffer with Schmitt trigger enabled
tHZ
Enable to Pad delay through the Output Buffer—High to Z
tZH
Enable to Pad delay through the Output Buffer—Z to High
tLZ
Enable to Pad delay through the Output Buffer—Low to Z
tZL
Enable to Pad delay through the Output Buffer—Z to Low
tZHS
Enable to Pad delay through the Output Buffer with delayed enable—Z to High
tZLS
Enable to Pad delay through the Output Buffer with delayed enable—Z to Low
相關(guān)PDF資料
PDF描述
A3PE1500-2PQ208I IC FPGA 1KB FLASH 1.5M 208-PQFP
SST25VF040B-80-4I-SAE IC FLASH SER 4MB 80MHZ SPI 8SOIC
A3PE1500-2PQG208I IC FPGA 1KB FLASH 1.5M 208-PQFP
25LC160-I/P IC EEPROM 16KBIT 2MHZ 8DIP
A54SX72A-2FGG256I IC FPGA SX-A 108K 256-FBGA
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M1A3PE1500-2PQ896 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:ProASIC3E Flash Family FPGAs
M1A3PE1500-2PQ896ES 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:ProASIC3E Flash Family FPGAs
M1A3PE1500-2PQ896I 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:ProASIC3E Flash Family FPGAs
M1A3PE1500-2PQ896PP 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:ProASIC3E Flash Family FPGAs
M1A3PE1500-2PQG208 功能描述:IC FPGA 1KB FLASH 1.5M 208-PQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:ProASIC3E 產(chǎn)品培訓(xùn)模塊:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色產(chǎn)品:Cyclone? IV FPGAs 標(biāo)準(zhǔn)包裝:60 系列:CYCLONE® IV GX LAB/CLB數(shù):9360 邏輯元件/單元數(shù):149760 RAM 位總計(jì):6635520 輸入/輸出數(shù):270 門數(shù):- 電源電壓:1.16 V ~ 1.24 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FBGA(23x23)