- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄180066 > M1AFS250-FPQG208 FPGA, 250000 GATES, PQFP208 PDF資料下載
參數(shù)資料
| 型號(hào)： | M1AFS250-FPQG208 |
| 元件分類： | FPGA |
| 英文描述： | FPGA, 250000 GATES, PQFP208 |
| 封裝： | 0.50 MM PITCH, GREEN, PQFP-208 |
| 文件頁(yè)數(shù)： | 275/318頁(yè) |
| 文件大小： | 10129K |
| 代理商： | M1AFS250-FPQG208 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)第171頁(yè)第172頁(yè)第173頁(yè)第174頁(yè)第175頁(yè)第176頁(yè)第177頁(yè)第178頁(yè)第179頁(yè)第180頁(yè)第181頁(yè)第182頁(yè)第183頁(yè)第184頁(yè)第185頁(yè)第186頁(yè)第187頁(yè)第188頁(yè)第189頁(yè)第190頁(yè)第191頁(yè)第192頁(yè)第193頁(yè)第194頁(yè)第195頁(yè)第196頁(yè)第197頁(yè)第198頁(yè)第199頁(yè)第200頁(yè)第201頁(yè)第202頁(yè)第203頁(yè)第204頁(yè)第205頁(yè)第206頁(yè)第207頁(yè)第208頁(yè)第209頁(yè)第210頁(yè)第211頁(yè)第212頁(yè)第213頁(yè)第214頁(yè)第215頁(yè)第216頁(yè)第217頁(yè)第218頁(yè)第219頁(yè)第220頁(yè)第221頁(yè)第222頁(yè)第223頁(yè)第224頁(yè)第225頁(yè)第226頁(yè)第227頁(yè)第228頁(yè)第229頁(yè)第230頁(yè)第231頁(yè)第232頁(yè)第233頁(yè)第234頁(yè)第235頁(yè)第236頁(yè)第237頁(yè)第238頁(yè)第239頁(yè)第240頁(yè)第241頁(yè)第242頁(yè)第243頁(yè)第244頁(yè)第245頁(yè)第246頁(yè)第247頁(yè)第248頁(yè)第249頁(yè)第250頁(yè)第251頁(yè)第252頁(yè)第253頁(yè)第254頁(yè)第255頁(yè)第256頁(yè)第257頁(yè)第258頁(yè)第259頁(yè)第260頁(yè)第261頁(yè)第262頁(yè)第263頁(yè)第264頁(yè)第265頁(yè)第266頁(yè)第267頁(yè)第268頁(yè)第269頁(yè)第270頁(yè)第271頁(yè)第272頁(yè)第273頁(yè)第274頁(yè)當(dāng)前第275頁(yè)第276頁(yè)第277頁(yè)第278頁(yè)第279頁(yè)第280頁(yè)第281頁(yè)第282頁(yè)第283頁(yè)第284頁(yè)第285頁(yè)第286頁(yè)第287頁(yè)第288頁(yè)第289頁(yè)第290頁(yè)第291頁(yè)第292頁(yè)第293頁(yè)第294頁(yè)第295頁(yè)第296頁(yè)第297頁(yè)第298頁(yè)第299頁(yè)第300頁(yè)第301頁(yè)第302頁(yè)第303頁(yè)第304頁(yè)第305頁(yè)第306頁(yè)第307頁(yè)第308頁(yè)第309頁(yè)第310頁(yè)第311頁(yè)第312頁(yè)第313頁(yè)第314頁(yè)第315頁(yè)第316頁(yè)第317頁(yè)第318頁(yè)
Fusion Device Family Overview
1- 2
Prel i minary v1 .7
user with a high level of flexibility and integration to support a wide variety of mixed-signal
applications. The flash memory block capacity ranges from 2 Mbits to 8 Mbits. The integrated 12-
bit ADC supports up to 30 independently configurable input channels. The on-chip crystal and RC
oscillators work in conjunction with the integrated phase-locked loops (PLLs) to provide clocking
support to the FPGA array and on-chip resources. In addition to supporting typical RTC uses such as
watchdog timer, the Fusion RTC can control the on-chip voltage regulator to power down the
device (FPGA fabric, flash memory block, and ADC), enabling a low-power standby mode.
The Actel Fusion family offers revolutionary features, never before available in an FPGA. The
nonvolatile flash technology gives the Fusion solution the advantage of being a secure, low-power,
single-chip solution that is live at power-up. Fusion is reprogrammable and offers time to market
benefits at an ASIC-level unit cost. These features enable designers to create high-density systems
using existing ASIC or FPGA design flows and tools.
The family has up to 1.5 M system gates, supported with up to 270 kbits of true dual-port SRAM, up
to 8 Mbits of flash memory, 1 kbit of user FlashROM, and up to 278 user I/Os. With integrated flash
memory, the Fusion family is the ultimate soft-processor platform. The AFS600 and AFS1500 devices
both support the Actel ARM7 core (CoreMP7). The ARM-enabled versions are identified with the
M7 prefix as M7AFS600 and M7AFS1500. The AFS250, AFS600, and AFS1500 devices support the
Actel Cortex-M1 core. The Cortex-M1-enabled versions are identified with the M1 prefix as
M1AFS250, M1AFS600, and M1AFS1500.
Flash Advantages
Reduced Cost of Ownership
Advantages to the designer extend beyond low unit cost, high performance, and ease of use. Flash-
based Fusion devices are live at power-up and do not need to be loaded from an external boot
PROM. On-board security mechanisms prevent access to the programming information and enable
secure remote updates of the FPGA logic. Designers can perform secure remote in-system
reprogramming to support future design iterations and field upgrades, with confidence that
valuable IP cannot be compromised or copied. Secure ISP can be performed using the industry-
standard AES algorithm with MAC data authentication on the device. The Fusion family device
architecture mitigates the need for ASIC migration at higher user volumes. This makes the Fusion
family a cost-effective ASIC replacement solution for applications in the consumer, networking and
communications, computing, and avionics markets.
Security
As the nonvolatile, flash-based Fusion family requires no boot PROM, there is no vulnerable
external bitstream. Fusion devices incorporate FlashLock, which provides a unique combination of
reprogrammability and design security without external overhead, advantages that only an FPGA
with nonvolatile flash programming can offer.
Fusion devices utilize a 128-bit flash-based key lock and a separate AES key to secure programmed
IP and configuration data. The FlashROM data in Fusion devices can also be encrypted prior to
loading. Additionally, the Flash memory blocks can be programmed during runtime using the
industry-leading AES-128 block cipher encryption standard (FIPS Publication 192). The AES standard
was adopted by the National Institute of Standards and Technology (NIST) in 2000 and replaces the
DES standard, which was adopted in 1977. Fusion devices have a built-in AES decryption engine
and a flash-based AES key that make Fusion devices the most comprehensive programmable logic
device security solution available today. Fusion devices with AES-based security allow for secure
remote field updates over public networks, such as the Internet, and ensure that valuable IP
remains out of the hands of system overbuilders, system cloners, and IP thieves. As an additional
security measure, the FPGA configuration data of a programmed Fusion device cannot be read
back, although secure design verification is possible. During design, the user controls and defines
both internal and external access to the flash memory blocks.
Security, built into the FPGA fabric, is an inherent component of the Fusion family. The Flash cells
are located beneath seven metal layers, and many device design and layout techniques have been
used to make invasive attacks extremely difficult. Fusion with FlashLock and AES security is unique
in being highly resistant to both invasive and noninvasive attacks. Your valuable IP is protected,
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M1AFS250-FQN180 | FPGA, 250000 GATES, PBCC180 |
| M1AFS250-FQNG180 | FPGA, 250000 GATES, PBCC180 |
| M1AFS250-FFG256 | FPGA, 250000 GATES, PBGA256 |
| M1AFS250-FFGG256 | FPGA, 250000 GATES, PBGA256 |
| M1AFS250-FPQ208 | FPGA, 250000 GATES, PQFP208 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M1AFS250-FPQG256ES | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:Actel Fusion Mixed-Signal FPGAs |
| M1AFS250-FPQG256I | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:Actel Fusion Mixed-Signal FPGAs |
| M1AFS250-FPQG256PP | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:Actel Fusion Mixed-Signal FPGAs |
| M1AFS250-FQN256ES | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:Actel Fusion Mixed-Signal FPGAs |
| M1AFS250-FQN256I | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:Actel Fusion Mixed-Signal FPGAs |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。