3-24 Revision 4 Methodology Total Power Consumption鈥擯TOTAL
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� M1AFS600-2FGG484I
寤犲晢锛� Microsemi SoC
鏂囦欢闋�(y猫)鏁�(sh霉)锛� 195/334闋�(y猫)
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC FPGA 4MB FLASH 600K 484-FBGA
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 60
绯诲垪锛� Fusion®
RAM 浣嶇附瑷�(j矛)锛� 110592
杓稿叆/杓稿嚭鏁�(sh霉)锛� 172
闁€(m茅n)鏁�(sh霉)锛� 600000
闆绘簮闆诲锛� 1.425 V ~ 1.575 V
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
宸ヤ綔婧害锛� -40°C ~ 100°C
灏佽/澶栨锛� 484-BGA
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 484-FPBGA锛�23x23锛�
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DC and Power Characteristics
3-24
Revision 4
Methodology
Total Power Consumption鈥擯TOTAL
Operating Mode, Standby Mode, and Sleep Mode
PTOTAL = PSTAT + PDYN
PSTAT is the total static power consumption.
PDYN is the total dynamic power consumption.
Total Static Power Consumption鈥擯STAT
Operating Mode
PSTAT = PDC1 + (NNVM-BLOCKS * PDC4) + PDC5+ (NQUADS * PDC6) + (NINPUTS * PDC7) +
(NOUTPUTS * PDC8) + (NPLLS * PDC9)
NNVM-BLOCKS is the number of NVM blocks available in the device.
NQUADS is the number of Analog Quads used in the design.
NINPUTS is the number of I/O input buffers used in the design.
NOUTPUTS is the number of I/O output buffers used in the design.
NPLLS is the number of PLLs available in the device.
Standby Mode
PSTAT = PDC2
Sleep Mode
PSTAT = PDC3
Total Dynamic Power Consumption鈥擯DYN
Operating Mode
PDYN = PCLOCK + PS-CELL + PC-CELL + PNET + PINPUTS + POUTPUTS + PMEMORY + PPLL + PNVM+
PXTL-OSC + PRC-OSC + PAB
Standby Mode
PDYN = PXTL-OSC
Sleep Mode
PDYN = 0 W
Global Clock Dynamic Contribution鈥擯CLOCK
Operating Mode
PCLOCK = (PAC1 + NSPINE * PAC2 + NROW * PAC3 + NS-CELL * PAC4) * FCLK
NSPINE is the number of global spines used in the user design鈥攇uidelines are provided in the
"Spine Architecture" section of the Global Resources chapter in the Fusion and Extended
NROW is the number of VersaTile rows used in the design鈥攇uidelines are provided in the "Spine
Architecture" section of the Global Resources chapter in the Fusion and Extended Temperature
FCLK is the global clock signal frequency.
NS-CELL is the number of VersaTiles used as sequential modules in the design.
Standby Mode and Sleep Mode
PCLOCK = 0 W
Sequential Cells Dynamic Contribution鈥擯S-CELL
Operating Mode
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