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參數資料
| 型號： | M24512-WBN6T |
| 廠商： | 意法半導體 |
| 英文描述： | 512 Kbit Serial I睠 Bus EEPROM |
| 中文描述： | 512千位串行I眷總線的EEPROM |
| 文件頁數： | 5/24頁 |
| 文件大小： | 379K |
| 代理商： | M24512-WBN6T |
5/24
M24512
SIGNAL DESCRIPTION
Serial Clock (SCL).
This input signal is used to
strobe all data in and out of the device. In applica-
tions where this signal is used by slave devices to
synchronize the bus to a slower clock, the bus
master must have an open drain output, and a
pull-up resistor must be connected from Serial
Clock (SCL) to V
CC
. (
Figure 4.
indicates how the
value of the pull-up resistor can be calculated). In
most applications, though, this method of synchro-
nization is not employed, and so the pull-up resis-
tor is not necessary, provided that the bus master
has a push-pull (rather than open drain) output.
Serial Data (SDA).
This bi-directional signal is
used to transfer data in or out of the device. It is an
open drain output that may be wire-OR’ed with
other open drain or open collector signals on the
bus. A pull up resistor must be connected from Se-
rial Data (SDA) to V
CC
. (
Figure 4.
indicates how
the value of the pull-up resistor can be calculated).
Chip Enable (E0, E1, E2).
These input signals
are used to set the value that is to be looked for on
the three least significant bits (b3, b2, b1) of the 7-
bit Device Select Code. These inputs must be tied
to V
CC
or V
SS
, to establish the Device Select
Code. When not connected (left floating), these in-
puts are read as Low (0,0,0).
Write Control (WC).
This input signal is useful
for protecting the entire contents of the memory
from inadvertent write operations. Write opera-
tions are disabled to the entire memory array when
Write Control (WC) is driven High. When uncon-
nected, the signal is internally read as V
IL
, and
Write operations are allowed.
When Write Control (WC) is driven High, Device
Select and Address bytes are acknowledged,
Data bytes are not acknowledged.
Figure 4. Maximum R
P
Value versus Bus Parasitic Capacitance (C) for an I
2
C Bus
AI01665b
VCC
C
SDA
R
P
MASTER
R
P
SCL
C
100
0
4
8
12
16
20
C (pF)
M
)
10
1000
fc = 400kHz
fc = 100kHz
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相關代理商/技術參數 |
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| M24512-WDW6 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:512 Kbit Serial I睠 Bus EEPROM |
| M24512-WDW6G | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:512 Kbit and 256 Kbit Serial I2C bus EEPROM with three Chip Enable lines |
| M24512-WDW6P | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:512 Kbit and 256 Kbit Serial I2C bus EEPROM with three Chip Enable lines |
| M24512-WDW6T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:512 Kbit Serial I睠 Bus EEPROM |
| M24512-WDW6TG | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:512 Kbit and 256 Kbit Serial I2C bus EEPROM with three Chip Enable lines |
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