參數(shù)資料
型號(hào): M24C08-W
廠商: 意法半導(dǎo)體
元件分類: DRAM
英文描述: The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
中文描述: 該CAT24FC02是一個(gè)2 KB的EEPROM的國(guó)內(nèi)256個(gè)8位每字舉辦的串行CMOS
文件頁(yè)數(shù): 16/33頁(yè)
文件大?。?/td> 183K
代理商: M24C08-W
Device operation
M24C16, M24C08, M24C04, M24C02, M24C01
16/33
Figure 9.
Read mode sequences
1.
The seven most significant bits of the Device Select Code of a Random Read (in the 1
st
and 3
rd
bytes)
must be identical.
3.7
Read operations
Read operations are performed independently of the state of the Write Control (WC) signal.
The device has an internal address counter which is incremented each time a byte is read.
3.7.1
Random Address Read
A dummy Write is first performed to load the address into this address counter (as shown in
Figure 9
) but
without
sending a Stop condition. Then, the bus master sends another Start
condition, and repeats the Device Select Code, with the Read/Write bit (RW) set to 1. The
device acknowledges this, and outputs the contents of the addressed byte. The bus master
must
not
acknowledge the byte, and terminates the transfer with a Stop condition.
S
DEV SEL *
BYTE ADDR
S
DEV SEL
DATA OUT 1
AI01942
DATA OUT N
S
S
CURRENT
ADDRESS
READ
DEV SEL
DATA OUT
RANDOM
ADDRESS
READ
S
S
DEV SEL *
DATA OUT
SEQUENTIAL
CURRENT
READ
S
DATA OUT N
S
DEV SEL *
BYTE ADDR
SEQUENTIAL
RANDOM
READ
S
DEV SEL *
DATA OUT 1
S
ACK
R/W
NO ACK
ACK
R/W
ACK
ACK
R/W
ACK
ACK
ACK
NO ACK
R/W
NO ACK
ACK
ACK
R/W
ACK
ACK
R/W
ACK
NO ACK
相關(guān)PDF資料
PDF描述
M24C16-R The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
M24C32 32K Serial IIC Bus EEPROM(32K串行IIC總線EEPROM)
M25P16-VMN6TP 4 Mbit Uniform Sector, Serial Flash Memory
M25P16-VMN3P 4 Mbit Uniform Sector, Serial Flash Memory
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