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參數(shù)資料
| 型號： | M24C64-MB3 |
| 廠商： | 意法半導體 |
| 英文描述： | 16-Bit Transparent D-Type Latch With 3-State Outputs 48-TSSOP -40 to 85 |
| 中文描述： | 64Kbit和32Kbit串行IC總線的EEPROM |
| 文件頁數(shù)： | 11/26頁 |
| 文件大?。?/td> | 394K |
| 代理商： | M24C64-MB3 |
11/26
M24C64, M24C32
Figure 9. Write Cycle Polling Flowchart using ACK
Minimizing System Delays by Polling On ACK
During the internal Write cycle, the device discon-
nects itself from the bus, and writes a copy of the
data from its internal latches to the memory cells.
The maximum Write time (t
w
) is shown in
Table
16.
and
Table 17.
, but the typical time is shorter.
To make use of this, a polling sequence can be
used by the bus master.
The sequence, as shown in
Figure 9.
, is:
–
–
Initial condition: a Write cycle is in progress.
Step 1: the bus master issues a Start condition
followed by a Device Select Code (the first
byte of the new instruction).
Step 2: if the device is busy with the internal
Write cycle, no Ack will be returned and the
bus master goes back to Step 1. If the device
has terminated the internal Write cycle, it
responds with an Ack, indicating that the
device is ready to receive the second part of
the instruction (the first byte of this instruction
having been sent during Step 1).
–
WRITE Cycle
in Progress
AI01847C
Next
Operation is
Addressing the
Memory
START Condition
DEVICE SELECT
with RW = 0
ACK
Returned
YES
NO
YES
NO
ReSTART
STOP
DATA for the
WRITE Operation
DEVICE SELECT
with RW = 1
Send Address
and Receive ACK
First byte of instruction
with RW = 0 already
decoded by the device
YES
NO
START
Condition
Continue the
WRITE Operation
Continue the
Random READ Operation
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| M24C64-MB3P | 16-Bit Transparent D-Type Latch With 3-State Outputs 48-SSOP -40 to 85 |
| M24C64-MB3T | 16-Bit Transparent D-Type Latch With 3-State Outputs 48-SSOP -40 to 85 |
| M24C64-WMN3T | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| M24C64-WMN3TP | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| M24C64-WMN6 | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M24C64M-FCU6T/TF | 功能描述:64KBIT SERIAL I2C BUS EEPROM 制造商:stmicroelectronics 系列:- 包裝:剪切帶（CT） 零件狀態(tài):停產(chǎn) 格式 - 存儲器:EEPROMs - 串行 存儲器類型:EEPROM 存儲容量:64K（8K x 8） 速度:100kHz，400kHz，1MHz 接口:I2C，2 線串口 電壓 - 電源:1.7 V ~ 5.5 V 工作溫度:-40°C ~ 85°C（TA） 封裝/外殼:4-XFBGA 供應商器件封裝:4-WLCSP 標準包裝:1 |
| M24C64-MN6 | 功能描述:電可擦除可編程只讀存儲器 5.5V 64K (8Kx8) RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| M24C64MN6T | 制造商:ST MICRO 功能描述:* 制造商:STMicroelectronics 功能描述: |
| M24C64-MN6T | 制造商:STMicroelectronics 功能描述: |
| M24C64-MW6 | 功能描述:電可擦除可編程只讀存儲器 5.5V 64K (8Kx8) RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 |
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