參數(shù)資料
型號(hào)： M25P16-VMN3P
廠商： 意法半導(dǎo)體
元件分類(lèi)： DRAM
英文描述： 4 Mbit Uniform Sector, Serial Flash Memory
中文描述： 4兆位統(tǒng)一部門(mén)，串行閃存
文件頁(yè)數(shù)： 22/55頁(yè)
文件大?。?/td> 335K
代理商： M25P16-VMN3P
Instructions
M25P16
22/55
6.4
Read Status Register (RDSR)
The Read Status Register (RDSR) instruction allows the Status Register to be read. The
Status Register may be read at any time, even while a Program, Erase or Write Status
Register cycle is in progress. When one of these cycles is in progress, it is recommended to
check the Write In Progress (WIP) bit before sending a new instruction to the device. It is
also possible to read the Status Register continuously, as shown in
Figure 11
.
Table 6.
The status and control bits of the Status Register are as follows:
6.4.1
WIP bit
The Write In Progress (WIP) bit indicates whether the memory is busy with a Write Status
Register, Program or Erase cycle. When set to 1, such a cycle is in progress, when reset to
0 no such cycle is in progress.
6.4.2
WEL bit
The Write Enable Latch (WEL) bit indicates the status of the internal Write Enable Latch.
When set to 1 the internal Write Enable Latch is set, when set to 0 the internal Write Enable
Latch is reset and no Write Status Register, Program or Erase instruction is accepted.
6.4.3
BP2, BP1, BP0 bits
The Block Protect (BP2, BP1, BP0) bits are non-volatile. They define the size of the area to
be software protected against Program and Erase instructions. These bits are written with
the Write Status Register (WRSR) instruction. When one or more of the Block Protect (BP2,
BP1, BP0) bits is set to 1, the relevant memory area (as defined in
Table 2
) becomes
protected against Page Program (PP) and Sector Erase (SE) instructions. The Block Protect
(BP2, BP1, BP0) bits can be written provided that the Hardware Protected mode has not
been set. The Bulk Erase (BE) instruction is executed if, and only if, all Block Protect (BP2,
BP1, BP0) bits are 0.
6.4.4
SRWD bit
The Status Register Write Disable (SRWD) bit is operated in conjunction with the Write
Protect (W) signal. The Status Register Write Disable (SRWD) bit and Write Protect (W)
signal allow the device to be put in the Hardware Protected mode (when the Status Register
Write Disable (SRWD) bit is set to 1, and Write Protect (W) is driven Low). In this mode, the
non-volatile bits of the Status Register (SRWD, BP2, BP1, BP0) become read-only bits and
the Write Status Register (WRSR) instruction is no longer accepted for execution.
Status Register format
b7
b0
SRWD
0
0
BP2
BP1
BP0
WEL
WIP
Status Register Write Protect
Block Protect Bits
Write Enable Latch Bit
Write In Progress Bit
相關(guān)PDF資料
PDF描述
M25P16-VMN3TG 4 Mbit Uniform Sector, Serial Flash Memory
M25P16-VMN3TP 4 Mbit Uniform Sector, Serial Flash Memory
M25P16-VMN6G 4 Mbit Uniform Sector, Serial Flash Memory
M25P16-VMN6P 4 Mbit Uniform Sector, Serial Flash Memory
M25P16-VMN6TG 4 Mbit Uniform Sector, Serial Flash Memory
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M25P16-VMN3PB 制造商:Micron Technology Inc 功能描述:Flash Mem Serial-SPI 3.3V 16M-Bit 2M x 8 15ns 8-Pin SO N Tray 制造商:Micron Technology Inc 功能描述:16 MBIT, SERIAL FLASH MEMORY, 75 MHZ SPI BUS INTERFACE - Trays 制造商:Micron Technology Inc 功能描述:NOR Flash Serial-SPI 3.3V 16Mbit 2M x 8bit 15ns 8-Pin SO N Tray 制造商:Micron Technology Inc 功能描述:IC FLASH 16MBIT 75MHZ 8SO
M25P16VMN3T 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:512 Kbit to 32 Mbit, Low Voltage, Serial Flash Memory With 40 MHz or 50 MHz SPI Bus Interface
M25P16-VMN3T 制造商:NUMONYX 制造商全稱(chēng):Numonyx B.V 功能描述:16 Mbit, serial Flash memory, 75 MHz SPI bus interface
M25P16VMN3TG 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:512 Kbit to 32 Mbit, Low Voltage, Serial Flash Memory With 40 MHz or 50 MHz SPI Bus Interface
M25P16-VMN3TG 制造商:NUMONYX 制造商全稱(chēng):Numonyx B.V 功能描述:16 Mbit, serial Flash memory, 75 MHz SPI bus interface
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