參數(shù)資料
型號: M25PE80-VMW6TG
廠商: 意法半導體
元件分類: DRAM
英文描述: 4 Mbit Uniform Sector, Serial Flash Memory
中文描述: 4兆位統(tǒng)一部門,串行閃存
文件頁數(shù): 24/43頁
文件大小: 599K
代理商: M25PE80-VMW6TG
M25PE80
24/43
Protection always prevails:
When the Lock Down Bit of Sector 0 or Sector
15 is set to ‘1’.
If the Lock Down Bit of Sector 0 is ‘1’, all
the Lock Down Bits of the sub-sectors in
Sector 0 are forced to ‘1’.
If the Lock Down Bit of Sector 15 is ‘1’, all
the Lock Down Bits of the sub-sectors in
Sector 15 are forced to ‘1’
When the Write Lock Bit of Sector 0 or Sector
15 is set to ‘1’.
if the Write Lock Bit of Sector 0 is ‘1’, the
Write Lock Bits of all the sub-sectors in
Sector 0 are forced to ‘1’ (even if their
Lock Down Bits are set to ‘1’).
if the Write Lock Bit of Sector 15 is ‘1’, the
Write Lock Bits of all the sub-sectors in
Sector 15 are forced to ‘1’ (even if their
Lock Down Bits are set to ‘1’).
When the Write Lock Bit of Sector 0 or Sector
15 is reset to ‘0’.
if the Write Lock Bit of Sector 0 is ‘0’, all
the sub-sectors in Sector 0 whose Lock
Down Bit is ‘0’ have their Write Lock Bits
forced to ‘0’.
if the Write Lock Bit of Sector 15 is ‘0’, all
the sub-sectors in Sector 15 whose Lock
Down Bit is ‘0’ have their Write Lock Bits
forced to ‘0’.
When the Write Lock Bit of any sector or sub-
sector is set to ‘1’, any instruction that may
modify the contents of this sector or sub-
sector will be rejected (including Sector Erase
and Bulk Erase).
Note that when the WRLR instruction acts both on
Write Lock (WL) and Lock Down (LD) bits, it firstly
programs the WL bit, and then the LD bit.
As an example, if a sub-sector Lock Register set-
tings are xxxx0101b and a WRLR instruction is is-
sued with a Lock Register In data set to
00000010b:
1.
the sector WL bit is first set to ‘0’ (and all sub-
sectors that are not locked-down will have
their WL bit reset to ‘0’).
2.
the sector LD bit and all sub-sectors LD bits
are set to ‘1’.
In this case, the final value of the above sub-sector
Lock Register is xxxx1010b.
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