參數(shù)資料
型號(hào): M2764A-3F1
廠商: 意法半導(dǎo)體
英文描述: NMOS 64K 8K x 8 UV EPROM
中文描述: NMOS管64K的8K的× 8紫外線存儲(chǔ)器
文件頁(yè)數(shù): 7/10頁(yè)
文件大?。?/td> 109K
代理商: M2764A-3F1
tAVPL
VALID
AI00779
A0-A12
Q0-Q7
VPP
VCC
P
G
DATA IN
DATA OUT
E
tQVPL
tVPHPL
tVCHPL
tPHQX
tPLPH
tGLQV
tQXGL
tELPL
tGHQZ
tGHAX
PROGRAM
VERIFY
Figure 6. Programming and Verify Modes AC Waveforms
AI00775B
n = 1
Last
Addr
VERIFY
P = 1ms Pulse
++n
> 25
++ Addr
VCC = 6V, VPP = 12.5V
FAIL
CHECK ALL BYTES
VCC = 5V, VPP 5V
YES
NO
YES
NO
YES
NO
P = 3ms Pulse by n
Figure 7. Fast Programming Flowchart
been successfully programmed. A flowchart of the
M2764A Fast Programming Algorithm is shown on
the last page. The Fast Programming Algorithm
utilizes two different pulse types: initial and over-
program.
The duration of the initial P pulse(s) is 1ms, which
will then be followed by a longer overprogram pulse
of length 3ms by n (n is equal to the number of the
initial one millisecond pulses applied to a particular
M2764A location), before a correct verify occurs.
Up to 25 one-millisecond pulses per byte are pro-
vided for before the overprogram pulse is applied.
The entire sequence of program pulses and byte
verifications is performed at V
CC
= 6V and V
PP
=
12.5V. When the Fast Programming cycle has been
completed, all bytes should be compared to the
original data with V
CC
= 5V and V
PP
= 5V.
Program Inhibit
Programming of multiple M2764A in parallel with
different data is also easily accomplished. Except
for E, all like inputs (including G) of the parallel
M2764A may be common. A TTL low pulse applied
to a M2764A’s E input, with V
PP
at 12.5V, will
program that M2764A. A high level E input inhibits
the other M2764As from being programmed.
DEVICE OPERATION
(cont’d)
7/10
M2764A
相關(guān)PDF資料
PDF描述
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M2764A AVDVANCED 64K (8K x 8) UV ERASABLE PROM
M27C1001-10B1TR 1 Mbit 128Kb x8 UV EPROM and OTP EPROM
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