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參數(shù)資料
| 型號： | M27C4002-70F6X |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 4 Mbit (256Kb x16) UV EPROM and OTP EPROM |
| 中文描述： | 4兆位（256Kb的× 16）紫外線存儲器和OTP存儲器 |
| 文件頁數(shù)： | 7/18頁 |
| 文件大?。?/td> | 184K |
| 代理商： | M27C4002-70F6X |
7/18
M27C4002
Figure 5. Read Mode AC Waveforms
AI00731B
tAXQX
tEHQZ
A0-A17
E
G
Q0-Q15
tAVQV
tGHQZ
tGLQV
tELQV
VALID
Hi-Z
VALID
System Considerations
The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
devices. The supply current, I
CC
, has three seg-
ments that are of interest to the system designer:
the standby current level, the active current level,
and transient current peaks that are produced by
the falling and rising edges of E. The magnitude of
the transient current peaks is dependent on the
output capacitive and inductive loading of the de-
vice. The associated transient voltage peaks can
be suppressed by complying with the two line out-
put control and by properly selected decoupling
capacitors. It is recommended that a 0.1μF ceram-
ic capacitor be used on every device between V
CC
and V
SS
. This should be a high frequency capaci-
tor of low inherent inductance and should be
placed as close to the device as possible. In addi-
tion, a 4.7μF bulk electrolytic capacitor should be
used between V
CC
and V
SS
for every eight devic-
es. The bulk capacitor should be located near the
power supply connection point.The purpose of the
bulk capacitor is to overcome the voltage drop
caused by the inductive effects of PCB traces.
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