參數(shù)資料
型號: M27C801-80K1TR
廠商: 意法半導(dǎo)體
英文描述: 8 Mbit 1Mb x 8 UV EPROM and OTP EPROM
中文描述: 8兆1兆× 8紫外線存儲器和OTP存儲器
文件頁數(shù): 4/16頁
文件大?。?/td> 153K
代理商: M27C801-80K1TR
M27C801
4/16
DEVICE OPERATION
The operating modes of the M27C801 are listed in
the Operating Modes table. A single power supply
is required in the read mode. All inputs are TTL
levels except for GV
PP
and 12V on A9 for Elec-
tronic Signature and Margin Mode Set or Reset.
Read Mode
The M27C801 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable (G) is the output control and should
be used to gate data to the output pins, indepen-
dent of device selection. Assuming that the ad-
dresses are stable, the address access time
(t
AVQV
) is equal to the delay from E to output
(t
ELQV
). Data is available at the output after a delay
of t
GLQV
from the falling edge of G, assuming that
E has been low and the addresses have been sta-
ble for at least t
AVQV
-t
GLQV
.
Standby Mode
The M27C801 has a standby mode which reduces
the supply current from 35mA to 100μA.
The M27C801 is placed in the standby mode by
applying a CMOS high signal to the E input. When
in the standby mode, the outputs are in a high im-
pedance state, independent of the GV
PP
input.
Table 5. AC Measurement Conditions
High Speed
Standard
Input Rise and Fall Times
10ns
20ns (10% to 90%)
Input Pulse Voltages
0 to 3V
0.4 to 2.4V
Input and Output Timing Ref. Voltages
1.5V
0.8 and 2V
Figure 3. AC Testing Input Output Waveform
AI01822
3V
High Speed
0V
1.5V
2.4V
Standard
0.4V
2.0V
0.8V
Figure 4. AC Testing Load Circuit
AI01823B
1.3V
OUT
CL
CL = 30pF for High Speed
CL = 100pF for Standard
CL includes JIG capacitance
3.3k
1N914
DEVICE
UNDER
TEST
Table 6. Capacitance
(1)
(T
A
= 25 °C, f = 1 MHz)
Symbol
Parameter
Note: 1. Sampled only, not 100% tested.
Test Condition
Min
Max
Unit
C
IN
Input Capacitance
V
IN
= 0V
6
pF
C
OUT
Output Capacitance
V
OUT
= 0V
12
pF
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