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參數(shù)資料
| 型號(hào)： | M27V101-200K6TR |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 1-Bit to 2-Bit Address Driver With 3-State Outputs 80-TSSOP -40 to 85 |
| 中文描述： | 1兆位的128KB × 8低壓紫外線可擦寫可編程只讀存儲(chǔ)器和OTP存儲(chǔ)器 |
| 文件頁數(shù)： | 8/15頁 |
| 文件大?。?/td> | 104K |
| 代理商： | M27V101-200K6TR |
M27V101
8/15
PRESTO II Programming Algorithm
PRESTO II Programming Algorithm allows the
whole array to be programmed, with a guaranteed
margin, in a typical time of 13 seconds. Program-
ming with PRESTO II involves in applying a se-
quence of 100
μ
s program pulses to eachbyte until
a correct verify occurs (see Figure 7). During pro-
gramming and verify operation, aMARGIN MODE
circuit is automatically activated in order to guar-
antee that each cell is programmed with enough
margin. Nooverprogram pulse is applied since the
verify in MARGIN MODE at V
CC
muh higher than
3.6V provides necessary margin to each pro-
grammed cell.
Program Inhibit
Programming of multiple M27V101s in parallel
with different data is also easily accomplished. Ex-
cept for E, all likeinputs including G of the parallel
M27V101 may be common. A TTL low level pulse
applied to a M27V101’s P input, with E low and
V
PP
at 12.75V, will program that M27V101. A high
level E input inhibits the other M27V101s from be-
ing programmed.
Program Verify
A verify (read) should be performed on the pro-
grammed bits to determine that theywere correct-
ly programmed. The verify is accomplished with E
and G at V
IL
, P at V
IH
, V
PP
at 12.75V and V
CC
at
6.25V.
Figure 6. Programming and Verify Modes AC Waveforms
tAVPL
VALID
AI00714
A0-A16
Q0-Q7
VPP
VCC
P
G
DATA IN
DATA OUT
E
tQVPL
tVPHPL
tVCHPL
tPHQX
tPLPH
tGLQV
tQXGL
tELPL
tGHQZ
tGHAX
PROGRAM
VERIFY
Figure 7. Programming Flowchart
AI00715C
n = 0
Last
Addr
VERIFY
P = 100
μ
s Pulse
++n
= 25
++ Addr
VCC= 6.25V, VPP= 12.75V
FAIL
CHECK ALL BYTES
1st: VCC= 6V
2nd: VCC= 4.2V
YES
NO
YES
NO
YES
NO
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M27V101-200N6TR | 1-Bit to 2-Bit Address Driver With 3-State Outputs 80-TSSOP -40 to 85 |
| M27V101-90B1TR | 1-Bit to 2-Bit Address Driver With 3-State Outputs 80-TSSOP -40 to 85 |
| M27V101-90B6TR | 1 Mbit 128Kb x 8 Low Voltage UV EPROM and OTP EPROM |
| M27V101-90F1TR | 1 Mbit 128Kb x 8 Low Voltage UV EPROM and OTP EPROM |
| M27V101-90F6TR | 2.5-V/3.3-V 16-Bit Buffers/Drivers With 3-State Outputs 48-SSOP -40 to 85 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M27V101-200N1TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:1 Mbit 128Kb x 8 Low Voltage UV EPROM and OTP EPROM |
| M27V101-200N6TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:1 Mbit 128Kb x 8 Low Voltage UV EPROM and OTP EPROM |
| M27V101-90B1TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:1 Mbit 128Kb x 8 Low Voltage UV EPROM and OTP EPROM |
| M27V101-90B6TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:1 Mbit 128Kb x 8 Low Voltage UV EPROM and OTP EPROM |
| M27V101-90F1TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:1 Mbit 128Kb x 8 Low Voltage UV EPROM and OTP EPROM |
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