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參數(shù)資料
| 型號(hào)： | M27V400-100B6TR |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 4 Mbit 512Kb x8 or 256Kb x16 UV EPROM and OTP EPROM |
| 中文描述： | 4兆位512KB的x8或256Kb的x16紫外線存儲(chǔ)器和OTP存儲(chǔ)器 |
| 文件頁(yè)數(shù)： | 2/14頁(yè) |
| 文件大小： | 117K |
| 代理商： | M27V400-100B6TR |
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M27V400
2/14
Figure 2. DIP Connections
Q0
Q8
Q1
Q9
Q2
Q11
A2
A1
A0
E
VSS
A14
A15
A16
BYTEVPP
VSS
Q15A–1
Q7
Q14
Q6
Q13
Q5
A13
Q12
Q4
Q10
Q3
VCC
G
A10
A11
A9
A3
A17
A7
A8
A6
A5
A4
AI01635
M27C400
8
9
10
11
12
13
14
15
16
17
1
2
3
4
5
6
7
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
40
39
38
37
36
35
34
33
A12
Table 1. Signal Names
A0-A17
Address Inputs
Q0-Q7
Data Outputs
Q8-Q14
Data Outputs
Q15A–1
Data Output / Address Input
E
Chip Enable
G
Output Enable
BYTEV
PP
Byte Mode / Program Supply
V
CC
Supply Voltage
V
SS
Ground
DEVICE OPERATION
The operating modes of the M27V400 are listed in
the Operating Modes Table. A single power supply
is required in the read mode. All inputs are TTL
compatible except for V
PP
and 12V on A9 for the
Electronic Signature.
Read Mode
The M27V400 has two organisations, Word-wide
and Byte-wide. The organisation is selected by the
signal level on the BYTEV
PP
pin. When BYTEV
PP
is at V
IH
the Word-wide organisation is selected
and the Q15A–1 pin is used for Q15 Data Output.
When the BYTEV
PP
pin is at V
IL
the Byte-wide or-
ganisation is selected and the Q15A–1 pin is used
for the Address Input A–1. When the memory is
logically regarded as 16 bit wide, but read in the
Byte-wide organisation, then with A–1 at V
IL
the
lower 8 bits of the 16 bit data are selected and with
A–1 at V
IH
the upper 8 bits of the 16 bit data are
selected.
The M27V400 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. In addition the Word-wide or
Byte- wide organisation must be selected.
Chip Enable (E) is the power control and should be
used for device selection. Output Enable (G) is the
output control and should be used to gate data to
the output pins independent of device selection.
Assuming that the addresses are stable, the ad-
dress access time (t
AVQV
) is equal to the delay
from E to output (t
ELQV
). Data is available at the
output after a delay of t
GLQV
from the falling edge
of G, assuming that E has been low and the ad-
dresses have been stable for at least t
AVQV
-t
GLQV
.
Standby Mode
The M27V400 has a standby mode which reduces
the supply current from 30mA to 20μA. The
M27V400 is placed in the standby mode by apply-
ing a CMOS high signal to the E input. When in the
standby mode, the outputs are in a high imped-
ance state, independent of the G input.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M27V400-100F1TR | 4 Mbit 512Kb x8 or 256Kb x16 UV EPROM and OTP EPROM |
| M27V400-100F6TR | 4 Mbit 512Kb x8 or 256Kb x16 UV EPROM and OTP EPROM |
| M27V400-100XB1TR | 4 Mbit 512Kb x8 or 256Kb x16 UV EPROM and OTP EPROM |
| M27V400-100XB6TR | 4 Mbit 512Kb x8 or 256Kb x16 UV EPROM and OTP EPROM |
| M27V400-100XF1TR | 4 Mbit 512Kb x8 or 256Kb x16 UV EPROM and OTP EPROM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M27V400-100F1TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit 512Kb x8 or 256Kb x16 UV EPROM and OTP EPROM |
| M27V400-100F6TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit 512Kb x8 or 256Kb x16 UV EPROM and OTP EPROM |
| M27V400-100XB1TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit 512Kb x8 or 256Kb x16 UV EPROM and OTP EPROM |
| M27V400-100XB6TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit 512Kb x8 or 256Kb x16 UV EPROM and OTP EPROM |
| M27V400-100XF1TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit 512Kb x8 or 256Kb x16 UV EPROM and OTP EPROM |
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