參數(shù)資料
型號: M27V801-180K1TR
廠商: 意法半導(dǎo)體
英文描述: 8 Mbit 1Mb x8 Low Voltage UV EPROM and OTP EPROM
中文描述: 8兆1兆x8低壓紫外線EPROM和檢察官辦公室存儲器
文件頁數(shù): 2/16頁
文件大?。?/td> 108K
代理商: M27V801-180K1TR
M27V801
2/16
Figure 2B. PLCC Pin Connections
AI01904
A
A8
A9
A11
GVPP
A10
E
Q
17
A1
A0
Q0
Q
Q
Q
Q
A7
A6
A5
A4
A3
A2
9
A
1
A
A13
A
Q7
32
A
V
M27V801
A
A14
Q
25
V
Figure 2A. DIP Pin Connections
A1
A0
Q0
Q1
Q2
VSS
A7
A6
A5
A4
A3
A2
A13
A8
A9
A11
GVPP
A10
E
Q7
Q6
A14
Q5
Q4
Q3
A17
A18
A16
A15
A12
A19
VCC
AI01903
M27V801
8
9
10
11
12
13
14
15
16
1
2
3
4
5
6
7
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
Figure 2C. TSOP Pin Connections
A1
A2
A0
Q0
A7
A6
A5
A4
A3
A13
A14
A17
A18
VCC
A10
E
A8
A9
Q7
Q6
A11
GVPP
Q5
Q4
Q1
Q2
Q3
VSS
A16
A15
A12
A19
AI01905
M27V801
(Normal)
8
9
1
16
17
24
25
32
For applications wherethe content is programmed
only one time and erasure is not required, the
M27V801 is offered in PDIP32, PLCC32 and
TSOP32 (8 x 20 mm) packages.
DEVICE OPERATION
The operating modes of the M27V801 are listed in
the Operating Modes table. A single power supply
is required in the read mode. All inputs are TTL
levels except for GV
PP
and 12V on A9 for Elec-
tronic Signature and Margin Mode Set or Reset .
Read Mode
The M27V801 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable (G) is the output control and should
be used to gate data to the output pins, indepen-
dent of device selection. Assuming that the ad-
dresses are stable, the address access time
(t
AVQV
) is equal to the delay from E to output
(t
ELQV
). Datais available atthe output aftera delay
of t
GLQV
from the falling edge of G, assuming that
E has been low and the addresses have been sta-
ble for at least t
AVQV
-t
GLQV
.
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