參數(shù)資料
型號: M27V801-200P6TR
廠商: 意法半導體
英文描述: 8 Mbit 1Mb x8 Low Voltage UV EPROM and OTP EPROM
中文描述: 8兆1兆x8低壓紫外線EPROM和檢察官辦公室存儲器
文件頁數(shù): 8/16頁
文件大?。?/td> 108K
代理商: M27V801-200P6TR
M27V801
8/16
Table 11. ProgrammingMode AC Characteristics
(1)
(T
A
= 25
°
C; V
CC
= 6.25V
±
0.25V; V
PP
= 12.75V
±
0.25V)
Symbol
Alt
Note: 1. V
CC
must be applied simultaneously with or before V
PP
and removed simultaneously or after V
PP
.
2. Sampled only, not 100% tested.
Parameter
Test Condition
Min
Max
Unit
t
AVEL
t
AS
Address Valid to Chip Enable Low
2
μ
s
t
QVEL
t
DS
Input Valid to Chip Enable Low
2
μ
s
t
VCHEL
t
VCS
V
CC
High to Chip Enable Low
2
μ
s
t
VPHEL
t
OES
V
PP
High to Chip Enable Low
2
μ
s
t
VPLVPH
t
PRT
V
PP
Rise Time
50
ns
t
ELEH
t
PW
Chip Enable Program Pulse Width (Initial)
45
55
μ
s
t
EHQX
t
DH
Chip Enable High to Input Transition
2
μ
s
t
EHVPX
t
OEH
Chip Enable High to V
PP
Transition
2
μ
s
t
VPLEL
t
VR
V
PP
Low to Chip Enable Low
2
μ
s
t
ELQV
t
DV
Chip Enable Low toOutput Valid
1
μ
s
t
EHQZ(2)
t
DFP
Chip Enable High to Output Hi-Z
0
130
ns
t
EHAX
t
AH
Chip Enable High to Address Transition
0
ns
Figure 6. MARGIN MODE AC Waveforms
Note: A8 High level = 5V; A9 High level = 12V.
AI00736B
tA9HVPH
tVPXA9X
A8
E
GVPP
A10 Set
VCC
tVPHEL
tA10LEH
tEXVPX
tA10HEH
A9
A10 Reset
tEXA10X
相關(guān)PDF資料
PDF描述
M27V801-200N6TR Quadruple 2-Input Positive-OR Buffers/Drivers 14-SOIC 0 to 70
M27V801-200K6TR Quadruple 2-Input Positive-AND Buffers/Drivers 14-PDIP 0 to 70
M27V801-200K1TR Quadruple 2-Input Positive-AND Buffers/Drivers 14-PDIP 0 to 70
M27V801-200F6TR 8 Mbit 1Mb x8 Low Voltage UV EPROM and OTP EPROM
M27V801-200F1TR Quadruple 2-Input Positive-AND Buffers/Drivers 14-SOIC 0 to 70
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