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參數(shù)資料
| 型號(hào)： | M29F040-150XN5R |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 4 Mbit 512Kb x8, Uniform Block Single Supply Flash Memory |
| 中文描述： | 4兆位512KB的× 8，統(tǒng)一座單電源閃存 |
| 文件頁數(shù)： | 4/31頁 |
| 文件大?。?/td> | 232K |
| 代理商： | M29F040-150XN5R |
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Operation
E
G
W
DQ0 - DQ7
Read
V
IL
V
IL
V
IH
Data Output
Write
V
IL
V
IH
V
IL
Data Input
Output Disable
V
IL
V
IH
V
IH
Hi-Z
Standby
V
IH
X
X
Hi-Z
Note:
X = V
IL
or V
IH
Table 3. Operations
Code
E
G
W
A0
A1
A6
A9
Other
Addresses
DQ0 - DQ7
Manufact. Code
V
IL
V
IL
V
IH
V
IL
V
IL
V
IL
V
ID
Don’t Care
20h
Device Code
V
IL
V
IL
V
IH
V
IH
V
IL
V
IL
V
ID
Don’t Care
E2h
Table 4. Electronic Signature
Code
E
G
W
A0
A1
A6
A16
A17
A18
Other
Addresses
DQ0 - DQ7
Protected Block
V
IL
V
IL
V
IH
V
IL
V
IH
V
IL
SA
SA
SA
Don’t Care
01h
Unprotected Block
V
IL
V
IL
V
IH
V
IL
V
IH
V
IL
SA
SA
SA
Don’t Care
00h
Note:
SA = Address of block being checked
Table 5. Block Protection Status
DEVICE OPERATION
Signal Descriptions
Address Inputs (A0-A18).
The address inputs for
the memory array are latched during a write opera-
tion. The A9 address input is used also for the
Electronic Signature read and Block Protect veri-
fication. When A9 is raised to V
ID
, either a Read
Manufacturer Code, Read Device Code or Verify
Block Protection is enabled depending on the com-
bination of levels on A0, A1 and A6. When A0, A1
and A6 are Low, the Electronic Signature Manufac-
turer code is read, when A0 is High and A1 and A6
are Low, the Device code is read, and when A1 is
High and A0 and A6 are low, the Block Protection
Status is read for the block addressed by A16, A17,
A18.
Data Input/Outputs (DQ0-DQ7).
The data input is
a byte to be programmed or a command written to
the C.I. Both are latched when Chip Enable E and
Write Enable W are active. The data output is from
the memory Array, the Electronic Signature, the
Data Polling bit (DQ7), the Toggle Bit (DQ6), the
Error bit (DQ5) or the Erase Timer bit (DQ3). Ou-
puts are valid when Chip Enable E and Output
Enable G are active. The output is high impedance
when the chip is deselected or the outputs are
disabled.
Chip Enable (E).
The Chip Enable activates the
memory control logic, input buffers, decoders and
sense amplifiers. E High deselects the memory and
reduces the power consumption to the standby
level. E can also be used to control writing to the
command register and to the memory array, while
W remains at a low level. Addresses are then
latched on the falling edge of E while data is latched
on the rising edge of E. The Chip Enable must be
forced to V
ID
during Block Unprotect operations.
Output Enable (G).
The Output Enable gates the
outputs through the data buffers during a read
operation. G must be forced to V
ID
level during
Block Protect and Block Unprotect operations.
Write Enable (W).
This input controls writing to the
Command Register and Address and Data latches.
Addresses are latched on the falling edge of W, and
Data Inputs are latched on the rising edge of W.
V
CC
Supply Voltage.
The power supply for all
operations (Read, Program and Erase).
V
SS
Ground.
V
SS
is the reference for all voltage
measurements.
4/31
M29F040
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| M29F040-150XN5TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit 512Kb x8, Uniform Block Single Supply Flash Memory |
| M29F040-150XN6R | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit 512Kb x8, Uniform Block Single Supply Flash Memory |
| M29F040-150XN6TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit 512Kb x8, Uniform Block Single Supply Flash Memory |
| M29F040-70K1R | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit 512Kb x8, Uniform Block Single Supply Flash Memory |
| M29F040-70K1TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit 512Kb x8, Uniform Block Single Supply Flash Memory |
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