參數(shù)資料
型號(hào): M29F200B-90M1R
廠商: 意法半導(dǎo)體
英文描述: Single Inverter Buffer/Driver with Open-Drain Output 5-SOT-23 -40 to 85
中文描述: 2兆位的256Kb x8或128KB的x16插槽,啟動(dòng)座單電源閃存
文件頁(yè)數(shù): 2/22頁(yè)
文件大?。?/td> 146K
代理商: M29F200B-90M1R
M29F200BT, M29F200BB
2/22
Figure 2A. TSOP Connections
DQ3
DQ10
DQ9
DQ1
DQ2
A6
A5
DQ0
G
VSS
W
A3
A2
A1
RB
NC
DQ6
DQ13
DQ5
A8
NC
A9
NC
A7
A10
DQ14
DQ12
DQ4
DQ15A–1
DQ7
VCC
DQ11
NC
NC
AI02913
M29F200BT
M29F200BB
12
13
1
24
25
36
37
48
DQ8
NC
A4
A12
A11
A13
A16
BYTE
VSS
A15
A14
E
A0
RP
Figure 2B. SO Connections
G
DQ0
DQ8
DQ1
DQ9
A3
A2
A1
A0
E
VSS
A13
A14
A15
A16
BYTE
VSS
DQ15A–1
DQ7
DQ14
DQ6
DQ13
A12
DQ5
DQ12
DQ2
DQ10
DQ3
DQ11
VCC
DQ4
A9
A10
W
A8
RB
NC
A4
NC
RP
A7
A6
A5
AI02914
M29F200BT
M29F200BB
8
9
10
11
12
13
14
15
16
17
2
3
4
5
6
7
32
31
30
29
28
27
26
25
24
23
22
20
21
19
18
44
43
42
41
39
38
37
36
35
34
33
A11
40
1
Table 1. Signal Names
A0-A16
Address Inputs
DQ0-DQ7
Data Inputs/Outputs
DQ8-DQ14
Data Inputs/Outputs
DQ15A–1
Data Input/Output or Address Input
E
Chip Enable
G
Output Enable
W
Write Enable
RP
Reset/Block Temporary Unprotect
RB
Ready/Busy Output
BYTE
Byte/Word Organization Select
V
CC
Supply Voltage
V
SS
Ground
NC
Not Connected Internally
SUMMARY DESCRIPTION
The M29F200B is a 2 Mbit (256Kb x8 or 128Kb
x16) non-volatile memory that canbe read, erased
and reprogrammed. These operations canbe per-
formed using a single5V supply. On power-up the
memory defaults to its Read mode where it can be
read in the same way as a ROM or EPROM. The
M29F200B is fully backward compatible with the
M29F200.
The memory is divided into blocks that can be
erased independently so it is possible to preserve
valid data while old data is erased. Each block can
be protected independently to prevent accidental
Program or Erase commands from modifying the
memory. Program and Erase commands are writ-
ten to the Command Interface of the memory. An
on-chip Program/Erase Controller simplifies the
process of programming or erasing the memory by
taking care of all of the special operations that are
required to update the memory contents. The end
of a program or erase operation can be detected
and any error conditions identified. The command
set required to control the memory is consistent
with JEDEC standards.
相關(guān)PDF資料
PDF描述
M29F200B-70N6TR Single Inverter Buffer/Driver with Open-Drain Output 5-SOT-23 -40 to 85
M29F200B-70N6R Single Inverter Gate 5-DSBGA -40 to 85
M29F200 2 Mbit 256Kb x8 or 128Kb x16, Boot Block Single Supply Flash Memory
M29F400 4 Mbit 512Kb x8 or 256Kb x16, Boot Block Single Supply Flash Memory
M29F400T-55M1R CONNECTOR ACCESSORY
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