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參數(shù)資料
| 型號： | M29W008EB70N6E |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Low Noise High-Speed Precision Single Supply Operational Amplifier 8-SOIC |
| 中文描述： | 8兆（1兆× 8，引導(dǎo)塊）3V電源快閃記憶體 |
| 文件頁數(shù)： | 11/43頁 |
| 文件大小： | 282K |
| 代理商： | M29W008EB70N6E |
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M29W008ET, M29W008EB
2 Signal descriptions
11/43
2.6
Ready/Busy Output (RB)
The Ready/Busy pin is an open-drain output that can be used to identify when the memory
array can be read. Ready/Busy is high impedance during Read mode, Auto Select mode and
Erase Suspend mode.
After a Hardware Reset, Bus Read and Bus Write operations cannot begin until Ready/Busy
becomes high impedance. See
Table 13: Reset/Block Temporary Unprotect AC Characteristics
and
Figure 13: Reset/Block Temporary Unprotect AC Waveforms
.
During Program or Erase operations Ready/Busy is Low, V
OL
. Ready/Busy will remain Low
during Read/Reset commands or Hardware Resets until the memory is ready to enter Read
mode.
2.7
Reset/Block Temporary Unprotect Input (RP)
The Reset/Block Temporary Unprotect input, RP, can be used to apply a Hardware Reset to the
memory or to temporarily unprotect all blocks that have been previously protected.
A Hardware Reset is achieved by holding RP Low, V
IL
for at least t
PLPX
. After Reset/Block
Temporary Unprotect goes High, V
IH
, if the device is in Read or Standby mode, it will be ready
for new operations t
PHEL
after the rising edge of RP. If the device is in Erase, Erase Suspend or
Program mode, the Hardware Reset will last t
PLYH
during which the RB signal will be held at
V
IL
. The end of the memory Hardware Reset will be indicated by the rising edge of RB. A
Hardware Reset during an Erase or Program operation will corrupt the data being programmed
or the blocks being erased. See
Table 13: Reset/Block Temporary Unprotect AC
Characteristics
and
Figure 13: Reset/Block Temporary Unprotect AC Waveforms
.
Holding RP at V
ID
will temporarily unprotect the previously protected blocks in the memory.
Program and Erase operations on all blocks will be possible. The transition of RP from V
IH
to
V
ID
must slower than t
PHPHH
.
When RP is returned from V
ID
to V
IH
all blocks temporarily unprotected will be again protected.
2.8
V
CC
Supply Voltage
The power supply for all operations (Read, Program and Erase).
A 0.1μF capacitor should be connected between the V
CC
Supply Voltage pin and the V
SS
Ground pin to decouple the current surges from the power supply. The PCB track widths must
be sufficient to carry the currents required during program and erase operations, I
CC3
2.9
V
SS
Ground
V
SS
is the reference for all voltage measurements.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M29W008EB70N6F | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8 Mbit (1Mb x 8, Boot Block) 3V Supply Flash Memory |
| M29W008EB90N1E | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8 Mbit (1Mb x 8, Boot Block) 3V Supply Flash Memory |
| M29W008EB90N1F | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8 Mbit (1Mb x 8, Boot Block) 3V Supply Flash Memory |
| M29W008EB90N6E | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8 Mbit (1Mb x 8, Boot Block) 3V Supply Flash Memory |
| M29W008EB90N6F | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8 Mbit (1Mb x 8, Boot Block) 3V Supply Flash Memory |
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