參數(shù)資料
型號(hào): M29W512B55NZ1T
廠(chǎng)商: 意法半導(dǎo)體
英文描述: 512 Kbit 64Kb x8, Bulk Low Voltage Single Supply Flash Memory
中文描述: 512千位64Kb的× 8,大量低電壓?jiǎn)坞娫撮W存
文件頁(yè)數(shù): 2/18頁(yè)
文件大?。?/td> 139K
代理商: M29W512B55NZ1T
M29W512B
2/18
Figure 2. TSOP Connections
A1
A2
A0
DQ0
A7
A6
A5
A4
A3
A13
A14
NC
W
VCC
A10
E
A8
A9
DQ7
DQ6
A11
G
DQ5
DQ4
DQ1
DQ2
DQ3
VSS
NC
A15
A12
NC
AI02976
M29W512B
8
9
1
16
17
24
25
32
Table 1. Signal Names
A0-A15
Address Inputs
DQ0-DQ7
Data Inputs/Outputs
E
Chip Enable
G
Output Enable
W
Write Enable
V
CC
Supply Voltage
V
SS
Ground
NC
Not Connected Internally
SUMMARY DESCRIPTION
The M29W512B is a 512 Kbit (64Kb x8) non-vola-
tile memory that can be read, erased and repro-
grammed. These operations can be performed
using a single low voltage (2.7 to 3.6V) supply. On
power-up the memory defaults to its Read mode
where it can be read in the same way as a ROM or
EPROM.
Program and Erase commands are written to the
Command Interface of the memory. An on-chip
Program/Erase Controller simplifies the process of
programming or erasing the memory by taking
care of all of the special operations that are re-
quired to update the memory contents. The end of
a program or erase operation can be detected and
any error conditions identified. The command set
required to control the memory is consistent with
JEDEC standards.
Chip Enable, Output Enable and Write Enable sig-
nals control the bus operation of the memory.
They allow simple connection to most micropro-
cessors, often without additional logic.
The memory is offered in TSOP32 (8 x 14mm) and
PLCC32 packages and it is supplied with all the
bits erased (set to ’1’).
Figure 3. PLCC Connections
AI02755
N
A13
A8
A9
A11
G
A10
E
D
17
A1
A0
DQ0
D
D
D
D
A7
A6
A5
A4
A3
A2
9
W
1
N
DQ7
A
A14
32
N
V
M29W512B
A
D
25
V
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