參數(shù)資料
型號(hào): M29W512B90NZ1T
廠商: 意法半導(dǎo)體
英文描述: 512 Kbit 64Kb x8, Bulk Low Voltage Single Supply Flash Memory
中文描述: 512千位64Kb的× 8,大量低電壓?jiǎn)坞娫撮W存
文件頁(yè)數(shù): 6/18頁(yè)
文件大?。?/td> 139K
代理商: M29W512B90NZ1T
M29W512B
6/18
During the program operation the memory will ig-
nore all commands. It is not possible to issue any
command to abort or pause the operation. Typical
program times are given in Table 5. Bus Read op-
erations during the program operation will output
the Status Register on the Data Inputs/Outputs.
See the section on the Status Register for more
details.
After the program operation has completed the
memory will return to the Read mode, unless an
error has occurred. When an error occurs the
memory will continue to output the Status Regis-
ter. A Read/Reset command must be issued to re-
set the error condition and return to Read mode.
Note that the Program command cannot change a
bit set at ’0’ back to ’1’. The Chip Erase command
must be used to set all the bits in the memory from
’0’ to ’1’.
Unlock Bypass Command.
The Unlock Bypass
command is used in conjunction with the Unlock
Bypass Program command to program the memo-
ry. When the access time to the device is long (as
with some EPROM programmers) considerable
time saving can be made by using these com-
mands. Three Bus Write operations are required
to issue the Unlock Bypass command.
Once the Unlock Bypass command has been is-
sued the memory will only accept the Unlock By-
pass Program command and the Unlock Bypass
Reset command. The memory can be read as if in
Read mode.
Unlock Bypass Program Command.
The Un-
lock Bypass Program command can be used to
program one address in memory at a time. The
command requires two Bus Write operations, the
final write operation latches the address and data
in the internal state machine and starts the Pro-
gram/Erase Controller.
The Program operation using the Unlock Bypass
Program command behaves identically to the Pro-
gram operation using the Program command. The
operation cannot be aborted and the Status Reg-
ister is read. Errors must be reset using the Read/
Reset command, which leaves the device in Un-
lock Bypass Mode. See the Program command for
details on the behavior.
Unlock Bypass Reset Command.
The Unlock
Bypass Reset command can be used to return to
Read/Reset mode from Unlock Bypass Mode.
Two Bus Write operations are required to issue the
Unlock Bypass Reset command.
Chip Erase Command.
The Chip Erase com-
mand can be used to erase the memory. Six Bus
Write operations are required to issue the Chip
Erase Command and start the Program/Erase
Controller.
All Bus Read operations during the Chip Erase op-
eration will output the Status Register on the Data
Inputs/Outputs. See the section on the Status
Register for more details. Typical chip erase times
are given in Table 5.
After the Chip Erase operation has completed the
memory will return to the Read Mode, unless an
error has occurred. When an error occurs the
memory will continue to output the Status Regis-
ter. A Read/Reset command must be issued to re-
set the error condition and return to Read Mode.
The Chip Erase command sets all of the bits in the
memory to ’1’. All previous data is lost.
Table 5. Program, Erase Times and Program, Erase Endurance Cycles
(T
A
= 0 to 70°C)
Note: 1. T
A
= 25°C, V
CC
= 3.3V.
Parameter
Min
Typ
(1)
Typical after
100k W/E Cycles
(1)
Max
Unit
Chip Erase (
All bits in the memory set to ‘0’)
0.5
0.5
sec
Chip Erase
1
1
6
sec
Program
10
10
200
μs
Chip Program
0.7
0.7
4
sec
Program/Erase Cycles
100,000
cycles
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