參數(shù)資料
型號(hào): M2V56S20ATP
廠商: Mitsubishi Electric Corporation
英文描述: 256M Synchronous DRAM
中文描述: 256M同步DRAM
文件頁(yè)數(shù): 22/49頁(yè)
文件大?。?/td> 244K
代理商: M2V56S20ATP
Feb.2000
MITSUBISHI LSIs
MITSUBISHI ELECTRIC
SDRAM (Rev.1.1)
Single Data Rate
M2V56S20/ 30/ 40/ TP -6, -7, -8
256M Synchronous DRAM
22
[ Write Interrupted by Precharge ]
Burst write operation can be interrupted by precharge of
the same bank.
Write recovery time (tWR) is
required from the last data to PRE command. During write recovery, data inputs must be masked by
DQM.
Write interrupted by Precharge (BL=4)
[ Write Interrupted by Burst Terminate ]
Burst terminate command can terminate burst write operation. In this case, the write recovery time is
not required and the bank remains active. WRITE to TBST interval is minimum 1 CLK.
CLK
Command
A0-9,11-12
A10
BA0-1
DQ
Write
Ya
0
00
ACT
Xa
0
00
Da0
Da1
PRE
0
00
ACT
Xa
0
00
tWR
tRP
DQM
CLK
Command
A0-9,11-12
A10
BA0-1
DQ
Write
Ya
0
00
Write interrupted by Terminate (BL=4)
ACT
Xa
0
00
Da0
Da1
TBST
Write
Yb
0
00
Db0
Db1
Db2
Db3
相關(guān)PDF資料
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M2V56S20ATP-5 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Synchronous DRAM
M2V56S20ATP-6 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Synchronous DRAM
M2V56S20ATP-7 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Synchronous DRAM
M2V56S20ATP-8 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Synchronous DRAM
M2V56S20TP 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Synchronous DRAM