410
Controlling Power Applications
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Figure 3.7.3. Set-up procedure of controlling power using stop mode (1)
Canceling protect
Protect register [Address 000A
16
]
PRCR
b7
b0
1
Enables writing to system clock control registers 0 and 1
(addresses 0006
16
and 0007
16
)
1 : Write-enabled
Main
NOP instruction X 5
INT5 interrupt request generation
Initial condition
b7
b0
Pull-up control register 2
[Address 03FE
16
]
PUR2
P8
4
to P8
7
pulled high
1
Port P8 direction register
[Address 03F2
16
]
PD8
Set P8
5
to input port
b7
b0
0
Interrupt enable level (IPL) = 0
Interrupt enable flag (I) = 1
INT5 interrupt control register
[Address 0049
16
]
INT5IC
Interrupt priority level select bit
Set higher value than the present IPL
b7
b0
1
0
0
Setting interrupt except stop mode cancel
I
nterrupt control register DMiIC(i=0, 1)
[Address 004B
16
, 004C
16
]
[Address 004E
16
]
[Address 004F
16
]
[Address 0050
16
]
[Address 0051
16
, 0053
16
]
[Address 0052
16
, 0054
16
]
ADIC
ASIOIC
FLDIC
SiTIC(i=0, 1)
SiRIC(i=0, 1)
TAiIC(i=0 to 4) [Address 0055
16
to 0059
16
]
TBiIC(i=0 to 2) [Address 005A
16
to 005C
16
]
Interrupt priority level select bit
000 : Interrupt disabled
b7
b0
0
0
0
Interrupt priority level select bit
000 : Interrupt disabled
Reserved bit
Always set to “0”
b7
b0
0
0
0
INTiIC(i=0 to 4)
[Address 0047
16
to 0048
16
]
[Address 005D
16
to 005F
16
]
0
All clocks off (stop mode)
System clock control register 1 [Address 0007
16
]
CM1
All clock stop control bit
1 : All clocks off (stop mode)
b7
b0
1
0
0
0
0
Reserved bit
Always set to “0”
Setting operation clock after returning from stop mode
System clock control register 0
[Address 0006
16
]
CM0
Port X
C
select bit
X
CIN
-X
COUT
generation
System clock select bit
X
CIN
, X
COUT
b7
1
b0
As this register becomes setting mentioned above when operating with X
CIN
(count source of BCLK is X
CIN
), the user does not need to set it again.
When operating with X
IN
, set port Xc select bit to “1” before setting system
clock select bit to “1”. The both bits cannot be set at the same time.
1
(When operating with X
CIN
after returning)
System clock control register 0
[Address 0006
16
]
CM0
Main clock (X
IN
-X
OUT
) stop bit
On
b7
0
b0
System clock select bit
X
IN
, X
OUT
As this register becomes setting mentioned above when
operating with X
IN
(count source of BCLK is X
IN
),
the user does not need to set it again.
0
(When operating with X
IN
after returning)
Polarity select bit
0 : Selects falling edge
Reserved bit
Always set to “0”
0
0