CPU Rewrite Mode (Flash Memory Version)
deeopmen
Preliminary Specifications REV.E
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M30220 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
178
Status Register
The status register shows the operating state of the flash memory and whether erase operations and
programs ended successfully or in error. It can be read in the following ways.
(1) By reading an arbitrary address from the user ROM area after writing the read status register
command (70
16
)
(2) By reading an arbitrary address from the user ROM area in the period from when the program starts
or erase operation starts to when the read array command (FF
16
) is input
Table 1.23.2 shows the status register.
Also, the status register can be cleared in the following way.
(1) By writing the clear status register command (50
16
)
After a reset, the status register is set to “80
16
”.
Each bit in this register is explained below.
Sequencer status (SR7)
After power-on, the sequencer status is set to 1(ready).
The sequencer status indicates the operating status of the device. This status bit is set to 0 (busy)
during write or erase operation and is set to 1 upon completion of these operations.
Erase status (SR5)
The erase status informs the operating status of erase operation to the CPU. When an erase error
occurs, it is set to 1.
The erase status is reset to 0 when cleared.
Program status (SR4)
The program status informs the operating status of write operation to the CPU. When a write error
occurs, it is set to 1.
The program status is reset to 0 when cleared.
If “1” is written for any of the SR5 or SR4 bits, the program, erase all blocks, and block erase com-
mands are not accepted. Before executing these commands, execute the clear status register com-
mand (50
16
) and clear the status register.
Also, any commands are not correct, both SR5 and SR4 are set to 1.