REVISION HISTORY
M30220 GROUP DATA SHEET
Rev.
Date
Description
Page
Summary
217
H
01/12/17
Features are partly revised.
Applications is partly added.
Page numbers of Table of Contents are partly revised.
Figure 1.1.1 is partly revised.
Table 1.1.1 is partly revised.
Figure 1.1.3 is partly revised.
Figure 1.1.4 is partly revised.
Pin description is partly revised.
Figure 1.4.1 is partly revised.
Figure 1.6.1 is partly added.
Figure 1.6.3 is partly revised.
Figure 1.7.1 is partly revised. Note is added.
Figure 1.7.2 is partly revised. Note 2 is added.
Figure 1.7.3 is partly revised. Note is added.
Processor mode register 0 in Figure 1.8.1 is partly revised.
System clock control register in Figure 1.9.4 is partly revised. Note 8 is partly re-
vised.
Explanation of “Wait Mode” is partly revised.
Explanation of “Hardware Interrupts” is partly revised.
Table 1.10.2 is partly revised. Note 3 and note 4 are partly revised.
Explanation of “Saving Registers is” partly revised. Note is partly revised.
Figure 1.10.9 is partly revised.
Explanation of “Key Input Interrupt” is partly revised.
Figure 1.10.13 is partly revised.
Figure 1.10.14 and 1.10.15 are partly revised.
______
Explanation of “(3) The NMI interrupt” is partly revised.
Explanation of “Watchdog timer” is partly added.
Table 1.12.1 is partly revised.
Explanation of “(1) Interrupt factors” is partly revised.
Figure 1.13.3 is partly revised.
Timer Ai register in Figure 1.13.5 is partly revised.
Up/down flag 0 and Up/down flag 1 in Figure 1.13.6 is partly revised. Note is added.
Table 1.13.2 is partly revised.
Figure 1.13.10 is partly revised.
Table 1.13.3 is partly revised.
Figure 1.13.11 is partly revised.
Table 1.13.5 is partly revised.
Figure 1.13.14 and Figure 1.13.15 are partly revised.
Figure 1.14.2 and Figure 1.14.3 are partly revised.
UARTi transmit buffer register in Figure1.15.4 is partly revised. Note is added.
UARTi bit rate generator in Figure1.15.4 is partly revised. Note is added.
Explanation of “LCD Drive Control Circuit” is partly revised.
LCD mode register in Figure 1.16.2 is partly revised.
Explanation of “Voltage Multiplier” is partly revised.
Figure 1.16.3 is partly revised.
Table 1.17.1 is partly revised.
Explanation of “Sample and hold” is partly revised.
Port P13 direction register in Figure 1.19.6 is partly revised. Note is deleted.
Port P7 register in Figure 1.19.7 is partly revised. Note is added.
Port P13 register in Figure 1.19.7 is partly revised. Note is deleted.
1
2
4
5
6
8
12
13
15
16
17
18
23
25
32
34
42
44
47
48
50
53
56
63
67
68
69
73
74
75
77
78
86
91
123
125
126
130
139
147
148