參數(shù)資料
型號: M30260F8TGP-D3
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP48
封裝: 7 X 7 MM, 0.50 MM PITCH, PLASTIC, LQFP-48
文件頁數(shù): 26/26頁
文件大?。?/td> 185K
代理商: M30260F8TGP-D3
M16C/26A Group (M16C/26A, M16C/26T)
Under development Preliminary specification
Specifications in this manual are tentative and subject to change.
1. Overview
Rev.0.40 2004.07.30
page 9 of 24
REJ03B0071-0040Z
24
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
36
35
34
33
32
31
30
29
28
27
26
25
48
47
46
45
44
43
42
41
40
39
38
37
P9
2
/TB2
IN
/AN
32
P9
1
/TB1
IN
/AN
31
CNV
SS
P1
7
/INT
5
/IDU
P1
6
/INT
4
/IDW
P1
5
/INT
3
/AD
TRG
/IDV
P107/AN7/KI3
P7
0
/TxD
2
/TA
0OUT
/SDA/CTS
1
/RTS
1
/CTS
0
/CLKS
1
X
OUT
V
SS
X
IN
P8
5
/NMI/SD
V
CC
P6
7
/TxD
1
P6
6
/RxD
1
P6
5
/CLK
1
RESET
P71/RxD2/TA0IN/SCL/CLK1
P72/CLK2/TA1OUT/V/RxD1
P73/CTS2/RTS2/TA1IN/V/TxD1
P74/TA2OUT/W
P75/TA2IN/W
P76/TA3OUT
P77/TA3IN
P80/TA4OUT/U
P81/TA4IN/U
P82/INT0
P83/INT1
P6
4
/CTS
1
/RTS
1
/CTS
0
/CLKS
1
P6
3
/TxD
0
P6
2
/RxD
0
P6
1
/CLK
0
P6
0
/CTS
0
/RTS
0
P9
0
/TB0
IN
/AN
30
/CLK
OUT
P8
7
/X
CIN
P8
6
/X
COUT
P106/AN6/KI2
P105/AN5/KI1
P104/AN4/KI0
P103/AN3
P102/AN2
P101/AN1
AVss
P100/AN0
VREF
AVcc
P93/AN24
P84/INT2/ZP
Note. Set PACR2 to PACR0 bit in the PACR register
to "1002" before you input and output it after
resetting to each pin. When the PACR register
isn't set up, the input and output function of
some of the pins are disabled.
Package: 48P6Q
Figure 1.5. Pin Configuration (Top View) of M16C/26A Group, 48-pin Package
PIN CONFIGURATION (top view)(Note)
1.5 Pin Configuration
Figures 1.5 and 1.6 show the pin configurations (top view).
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