參數(shù)資料
型號: M30291F8HP-D5
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP64
封裝: 10 X 10 MM, 0.50 MM PITCH, PLASTIC, LQFP-64
文件頁數(shù): 8/32頁
文件大小: 218K
代理商: M30291F8HP-D5
M16C/29 Group
Under development Preliminary specification
Specifications in this manual are tentative and subject to change.
4. Special Function Register (SFR) MAP
Rev.0.30 2004.06.15
page 16 of 30
REJ03B0072-0030Z
Address
Register
Symbol
After reset
000016
000116
000216
000316
000416
Processor mode register 0
PM0
0016
000516
Processor mode register 1
PM1
000010002
000616
System clock control register 0
CM0
010010002
000716
System clock control register 1
CM1
001000002
000816
000916
Address match interrupt enable register
AIER
XXXXXX002
000A16
Protect register
PRCR
XX0000002
000B16
000C16
Oscillation stop detection register
(Note 2)
CM2
0X0000102
000D16
000E16
Watchdog timer start register
WDTS
??16
000F16
Watchdog timer control register
WDC
00??????2 (Note3)
001016
Address match interrupt register 0
RMAD0
0016
001116
0016
001216
X016
001316
001416
Address match interrupt register 1
RMAD1
0016
001516
0016
001616
X016
001716
001816
001916
Voltage detection register 1
(Note 4,5)
VCR1
000010002
001A16
Voltage detection register 2
(Note 4,5)
VCR2
0016
001B16
001C16
PLL control register 0
PLC0
0001X0102
001D16
001E16
Processor mode register 2
PM2
XXX000002
001F16
Voltage down detection interrupt register
(Note 5)
D4INT
0016
002016
DMA0 source pointer
SAR0
??16
002116
??16
002216
X?16
002316
002416
DMA0 destination pointer
DAR0
??16
002516
??16
002616
X/16
002716
002816
DMA0 transfer counter
TCR0
??16
002916
??16
002A16
002B16
002C16
DMA0 control register
DM0CON
00000?002
002D16
002E16
002F16
003016
DMA1 source pointer
SAR1
??16
003116
??16
003216
X?16
003316
003416
DMA1 destination pointer
DAR1
??16
003516
??16
003616
X?16
003716
003816
DMA1 transfer counter
TCR1
??16
003916
??16
003A16
003B16
003C16
DMA1 control register
DM1CON
00000?002
003D16
003E16
003F16
Note 1: The blank areas are reserved and cannot be used by users.
Note 2: The CM20, CM21, and CM27 bits do not change at oscillation stop detection reset.
Note 3: The WDC5 bit is "0" (cold start) immediately after power-on. It can only be set to "1" in a program.
It is set to "0" when the input voltage at the VCC pin drops to Vdet2 or less while the VC25 bit in the VCR2 register is
set to "1" (RAM retention limit detection circuit enable).
Note 4: This register does not change at software reset, watchdog timer reset and oscillation stop detection reset.
Note 5: This registe can not use for T-ver. and V-ver.
X : Nothing is mapped to this bit
? : Undefined
4. Special Function Register (SFR) Map
Figure 4.1. SFR Map (1 of 11)
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