- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄45015 > M30302GCPFP 16-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PQFP100 PDF資料下載
參數(shù)資料
| 型號(hào)： | M30302GCPFP |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 20 MM, 0.65 MM PITCH, LEAD FREE, PLASTIC, LQFP-100 |
| 文件頁(yè)數(shù)： | 29/57頁(yè) |
| 文件大小： | 649K |
| 代理商： | M30302GCPFP |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)當(dāng)前第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)
5. Electrical Characteristics
Page 35 of 53
VCC1=VCC2=5V
Switching Characteristics
(VCC1 = VCC2 = 5V, VSS = 0V, at Topr =
20 to 85°C / 40 to 85°C unless otherwise specified)
NOTES:
1.
Calculated according to the BCLK frequency as follows:
n is “1” for 1-wait setting, f(BCLK) is 12.5MHz or less.
2.
Calculated according to the BCLK frequency as follows:
3.
This standard value shows the timing when the output is off, and
does not show hold time of data bus.
Hold time of data bus varies with capacitor volume and pull-up
(pull-down) resistance value.
Hold time of data bus is expressed in
t =
CR X ln (1VOL / VCC1)
by a circuit of the right figure.
For example, when VOL = 0.2VCC1, C = 30pF, R = 1k
Ω, hold time
of output ”L” level is
t =
30pF X 1kΩ X In(10.2VCC1 / VCC1)
= 6.7ns.
Table 5.26
Memory Expansion and Microprocessor Modes (for 1 wait setting and external area
access)
Symbol
Parameter
Standard
Unit
Min.
Max.
td(BCLK-AD)
Address Output Delay Time
See
25
ns
th(BCLK-AD)
Address Output Hold Time (in relation to BCLK)
3ns
th(RD-AD)
Address Output Hold Time (in relation to RD)
0
ns
th(WR-AD)
Address Output Hold Time (in relation to WR)
ns
td(BCLK-CS)
Chip Select Output Delay Time
25
ns
th(BCLK-CS)
Chip Select Output Hold Time (in relation to BCLK)
3ns
td(BCLK-ALE)
ALE Signal Output Delay Time
15
ns
th(BCLK-ALE)
ALE Signal Output Hold Time
4ns
td(BCLK-RD)
RD Signal Output Delay Time
25
ns
th(BCLK-RD)
RD Signal Output Hold Time
0
ns
td(BCLK-WR)
WR Signal Output Delay Time
25
ns
th(BCLK-WR)
WR Signal Output Hold Time
0
ns
td(BCLK-DB)
Data Output Delay Time (in relation to BCLK)
40
ns
th(BCLK-DB)
Data Output Hold Time (in relation to BCLK) (3)
4ns
td(DB-WR)
Data Output Delay Time (in relation to WR)
ns
th(WR-DB)
Data Output Hold Time (in relation to WR)(3)
ns
td(BCLK-HLDA)
HLDA Output Delay Time
40
ns
n0.5
–
()x10
9
fBCLK
()
------------------------------------
40 ns
[]
–
0.5x10
9
fBCLK
()
------------------------10 ns
[]
–
DBi
R
C
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M30302GCPGP | 16-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PQFP100 |
| M30304GEPGP | 16-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PQFP100 |
| M30302MAP-XXXGP | 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP100 |
| M30302MEP-XXXGP | 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP100 |
| M30302GEPFP | 16-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PQFP100 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M30302GCPGP | 制造商:RENESAS 制造商全稱(chēng):Renesas Technology Corp 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M30302GCP-XXXFP | 制造商:RENESAS 制造商全稱(chēng):Renesas Technology Corp 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M30302GCP-XXXGP | 制造商:RENESAS 制造商全稱(chēng):Renesas Technology Corp 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M30302GDPFP | 制造商:RENESAS 制造商全稱(chēng):Renesas Technology Corp 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M30302GDPGP | 制造商:RENESAS 制造商全稱(chēng):Renesas Technology Corp 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。