參數(shù)資料
型號(hào)： M30304GEPGP
元件分類(lèi)： 微控制器/微處理器
英文描述： 16-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PQFP100
封裝： 14 X 14 MM, 0.50 MM PITCH, LEAD FREE, PLASTIC, LQFP-100
文件頁(yè)數(shù)： 29/57頁(yè)
文件大小： 649K
代理商： M30304GEPGP
5. Electrical Characteristics
Page 35 of 53
VCC1=VCC2=5V
Switching Characteristics
(VCC1 = VCC2 = 5V, VSS = 0V, at Topr =
20 to 85°C / 40 to 85°C unless otherwise specified)
NOTES:
1.
Calculated according to the BCLK frequency as follows:
n is “1” for 1-wait setting, f(BCLK) is 12.5MHz or less.
2.
Calculated according to the BCLK frequency as follows:
3.
This standard value shows the timing when the output is off, and
does not show hold time of data bus.
Hold time of data bus varies with capacitor volume and pull-up
(pull-down) resistance value.
Hold time of data bus is expressed in
t =
CR X ln (1VOL / VCC1)
by a circuit of the right figure.
For example, when VOL = 0.2VCC1, C = 30pF, R = 1k
Ω, hold time
of output ”L” level is
t =
30pF X 1kΩ X In(10.2VCC1 / VCC1)
= 6.7ns.
Table 5.26
Memory Expansion and Microprocessor Modes (for 1 wait setting and external area
access)
Symbol
Parameter
Standard
Unit
Min.
Max.
td(BCLK-AD)
Address Output Delay Time
See
25
ns
th(BCLK-AD)
Address Output Hold Time (in relation to BCLK)
3ns
th(RD-AD)
Address Output Hold Time (in relation to RD)
0
ns
th(WR-AD)
Address Output Hold Time (in relation to WR)
ns
td(BCLK-CS)
Chip Select Output Delay Time
25
ns
th(BCLK-CS)
Chip Select Output Hold Time (in relation to BCLK)
3ns
td(BCLK-ALE)
ALE Signal Output Delay Time
15
ns
th(BCLK-ALE)
ALE Signal Output Hold Time
4ns
td(BCLK-RD)
RD Signal Output Delay Time
25
ns
th(BCLK-RD)
RD Signal Output Hold Time
0
ns
td(BCLK-WR)
WR Signal Output Delay Time
25
ns
th(BCLK-WR)
WR Signal Output Hold Time
0
ns
td(BCLK-DB)
Data Output Delay Time (in relation to BCLK)
40
ns
th(BCLK-DB)
Data Output Hold Time (in relation to BCLK) (3)
4ns
td(DB-WR)
Data Output Delay Time (in relation to WR)
ns
th(WR-DB)
Data Output Hold Time (in relation to WR)(3)
ns
td(BCLK-HLDA)
HLDA Output Delay Time
40
ns
n0.5
–
()x10
9
fBCLK
()
------------------------------------
40 ns
[]
–
0.5x10
9
fBCLK
()
------------------------10 ns
[]
–
DBi
R
C
相關(guān)PDF資料
PDF描述
M30302MAP-XXXGP 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP100
M30302MEP-XXXGP 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP100
M30302GEPFP 16-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PQFP100
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